tag: Synopsys

USB4: User Expectations Drive Design Complexity
By Synopsys - 05 Aug, 2020 - Comments: 0

This white paper outlines the capabilities of USB4 Hosts, Hubs, Docks, and Devices with an emphasis on how end-user expectations drive the complexity of USB4 products. USB4 is the most complex USB specification so far and requires designers to understand the USB4, USB 3.2, USB 2.0, USB Type-C, and the USB Power Delivery specifications. Designers must also understand PCIe and DisplayPort specifi... » read more

Creating Better Models For Software And Hardware Verification
By Ed Sperling - 04 Aug, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss what's ahead for verification with Daniel Schostak, Arm fellow and verification architect; Ty Garibay, vice president of hardware engineering at Mythic; Balachandran Rajendran, CTO at Dell EMC; Saad Godil, director of applied deep learning research at Nvidia; Nasr Ullah, senior director of performance architecture at SiFive. What follows are excerpt... » read more

EDA Forms The Basis For Designing Secure Systems
By Adam Cron - 03 Aug, 2020 - Comments: 0

By Adam Cron and Brandon Wang As Internet of Things (IoT) devices rapidly increase in popularity and deployment, security risks are arising at all levels. It could be at the usability level such as social engineering, pretexting, phishing; at the primitive level such as cryptanalysis; at the software level such as client-side scripting, code injection; and now even at the hardware level. Dur... » read more

The Evolution Of Digital Twins
By Brian Bailey - 03 Aug, 2020 - Comments: 1

Digital twins are starting to make inroads earlier in the chip design flow, allowing design teams to develop more effective models. But they also are adding new challenges in maintaining those models throughout a chip's lifecycle. Until a couple of years ago, few people in the semiconductor industry had even heard the term "digital twin." Then, suddenly, it was everywhere, causing confusion ... » read more

Universal Verification Methodology Running Out Of Steam
By Ann Mutschler - 30 Jul, 2020 - Comments: 2

For the past decade or so, the Universal Verification Methodology (UVM) has been the de facto verification methodology supported by the entire EDA industry. But as chips become more heterogeneous, more complex, and significantly larger, UVM is running out of steam. Consensus is building that some fundamental changes are required, moving tools up a level of abstraction and making them more ag... » read more

Open-Source Verification
By Brian Bailey - 30 Jul, 2020 - Comments: 1

Ask different people what open-source verification means and you will get a host of different answers. They range from the verification of open-source hardware, to providing an open-source verification infrastructure, to providing open-source stream generators or reference models, to open-source simulators and formal verification engines. Verification is about reducing risk. "Verification is... » read more

Blog Review: July 29
By Jesse Allen - 29 Jul, 2020 - Comments: 0

Rambus' Scott Best digs into low-cost attacks against security chips that are often used to gauge how resistant and well-designed they are and defensive countermeasures that can be taken. Mentor's Colin Walls urges embedded developers to put a priority on writing clear, maintainable code and considers when using a higher level language like C++ may be helpful. Synopsys' Scott Knowlton fin... » read more

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms
By Synopsys - 29 Jul, 2020 - Comments: 0

Machine-learning offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment. These new, ML-driven capabilities can be embedded in different design engines, gi... » read more

Memory Access In AI Systems
By Ed Sperling - 27 Jul, 2020 - Comments: 0

Memory access is a key consideration in AI system design. Ron Lowman, strategic marketing manager for IP at Synopsys, talks about how memory affects overall power consumption, why partitioning of on-chip and off-chip is so critical to performance and power, and how this changes from the cloud to the edge. » read more

Week In Review: Design, Low Power
By Jesse Allen - 24 Jul, 2020 - Comments: 0

Perforce Software acquired Methodics. Founded in 2006 and based in San Francisco, Methodics' IP lifecycle management and traceability software will join Perforce's larger portfolio of DevOps software that includes version control, Agile planning, and static code analysis. The two companies have had a strategic partnership in place with customers using software from both companies. Terms of the ... » read more

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