tag: Synopsys

Week In Review: Design, Low Power
By Jesse Allen - 01 May, 2020 - Comments: 0

Nvidia completed its $7 billion acquisition of Mellanox. The acquisition, initially announced over a year ago, brings Mellanox’s high-performance networking and interconnect technology to Nvidia's server efforts and gives the company full end-to-end offerings in the data center space. To date, this is the largest acquisition in Nvidia's history. Tools & IP Synopsys debuted its 3DIC Co... » read more

Inevitable Bugs
By Brian Bailey - 29 Apr, 2020 - Comments: 3

Are bug escapes inevitable? That was the fundamental question that Oski Technology recently put to a group of industry experts. The participants are primarily simulation experts who, in many cases, help direct the verification directions for some of the largest systems companies. In order to promote free discussion, all comments have been anonymized, distilling the primary thoughts of the parti... » read more

Blog Review: April 29
By Jesse Allen - 29 Apr, 2020 - Comments: 0

Arm's Paul Whatmough checks out SCALE-Sim, an open source cycle-accurate simulator specifically for neural processing unit (NPU) architectures. Mentor's Neil Johnson shows how a complete verification methodology requires complementary deployment of multiple techniques, with different options at each level of abstraction. Cadence's Paul McLellan checks out challenges in automotive reliabil... » read more

Week In Review: Design, Low Power
By Jesse Allen - 24 Apr, 2020 - Comments: 0

Tools & IP Codasip unveiled its Codasip SweRV Core EH1 Support Package, which provides support for Western Digital's open source RISC-V-based core. The support package provides a comprehensive set of tools and components needed to design, implement, test, and write software for a SweRV Core-based SoC with support for leading EDA open and commercial flows. A free basic version is available ... » read more

Analog Design Needs To Change
By Dave Reed - 23 Apr, 2020 - Comments: 0

It’s an exciting time to be involved in analog design! Innovation in analog design methodology has been flourishing with the introduction of new tools and improved methodologies. And this innovation is badly needed; analog design is getting tougher. Design schedules remain tight, and the technical challenges analog designers face continue to grow – especially when moving to advanced node te... » read more

Practical Processor Verification
By Brian Bailey - 23 Apr, 2020 - Comments: 0

Custom processors are making a resurgence, spurred on by the early success of the RISC-V ISA and the ecosystem that is rapidly building around it. But this shift is amid questions about whether processor verification has become a lost art. Years ago custom processors were common. But as the market consolidated around a handful of companies, so did the tools and expertise needed to develop th... » read more

Using Processor Trace At The System Level
By Ann Mutschler - 23 Apr, 2020 - Comments: 0

The race to process more data faster using less power is creating a series of debug challenges at the system level, where developers need to be able to trace interactions across multiple and often heterogeneous processing elements that may function independently of each other. In general, trace is a hardware debug feature that allows the run-time behavior of IP to be monitored. More specific... » read more

Fusion Technology
By Synopsys - 22 Apr, 2020 - Comments: 0

Learn how the recent semiconductor industry shifts are breaking the traditional RTL-to-GDSII flow, and how the new Synopsys Fusion Technology helps you cross the chasm. To read more, click here. » read more

Blog Review: April 22
By Jesse Allen - 22 Apr, 2020 - Comments: 0

Mentor's Shivani Joshi takes a look at the benefits of adding ground planes in PCB design to improve signal integrity and reduce electrical noise and interference. Cadence's Paul McLellan points to the gradual adoption of 3D packaged systems, the role of mobile in driving adoption, and the rise of chiplets. Synopsys' Taylor Armerding shares some tips for productive remote teamwork from th... » read more

DDR PHY Training
By Ed Sperling - 21 Apr, 2020 - Comments: 0

Brett Murdock, senior product marketing manager at Synopsys, explains how to train the DRAM physical layer using firmware, why that is so important for flexibility, and what kinds of issues engineers encounter when using this approach. » read more

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