tag: Synopsys

Gap Vs. Gap
By Ed Sperling - 26 Apr, 2012 - Comments: 0

By Ed Sperling Among tools vendors it’s been standard practice to listen closely to customers but not deliver everything they ask for—or at least not always on the customers’ timetable. This strategy has worked well enough for both sides in the past, but at 20nm and in stacked die configurations, the level of tension between these two worlds is increasing, and the gaps in the tool cha... » read more

From Cryptic Error Messages To Contradictory Commands
By Ed Sperling - 26 Apr, 2012 - Comments: 0

By Ann Steffora Mutschler For the past 30 years, semiconductor designers have increasingly relied on automated CAD tools to complete their projects. Over time, these tools have indeed improved from a functionality perspective, but sometimes usability has not kept up with users’ needs. Depending on which tools and what type of use, some tools are easier to use than others, according to Mik... » read more

Boosting Yield With Layout Awareness
By Ed Sperling - 26 Apr, 2012 - Comments: 0

By Ann Steffora Mutschler Yield. Just the word can make many engineers cringe and hide in their cubicles—especially with manufacturing problems and excessive power during test increasing causing failures. But the combination of physical data with diagnostics engines may be the light at the end of the tunnel, allowing for easier pinpointing of defects. There are many reasons why a chip fai... » read more

High-End Audio Made Easy: The Software Story
By Various Writers - 25 Apr, 2012 - Comments: 0

Audio requirements are soaring. Whereas audio used to be done in a few spare cycles of the main CPU, decoding today’s Blu-ray Disc 24-bit, 192 kHz high-definition audio streams, or post-processing 9.1 channel Pro Logic IIz streams, requires significant performance. An obvious solution is to offload the processing to one or more dedicated audio digital signal processors (DSPs) such as the Desi... » read more

Betting On Subsystems
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ed Sperling One of the consistent trends among successful companies, particularly in well-established industries, is that over time labor becomes specialized. No one can do everything well, and the more complex the systems the more pieces have to be outsourced. This creates immediate benefits for companies putting together the overall systems. They can focus on designs and doing what the... » read more

2.5D Leverages Existing Tools On The Way To 3D
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ann Steffora Mutschler As design and manufacturing issues with true 3D design continue to be worked out, interim 2.5D technologies are moving ahead as engineering teams leverage this packaging-driven approach to manage heat, cost, area and yield. Technologies such as Wide I/O memory support 2.5D, and when combined with logic they allow engineering teams to realize a performance increase,... » read more

Reliability Concerns Grow
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ed Sperling Knowing when to signoff on an IC design has always been as much art as science, matching engineering experience with managed risk. As ICs become more complex, however, even the most advanced chip companies are getting things wrong. Some of this can be fixed through software and some of it can be tweaked with programmable firmware. But some of it may have to be fixed in the ne... » read more

Power, Applications Drive New Thinking On System Planning
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ann Steffora Mutschler Throwing out the term ‘application-driven power-aware design methodology’ may sound like gobbledygook to some, but this concept is keeping many technologists awake at night—especially considering video games that heat iPads to 100+ degrees centigrade (near melting). The problem is very real, and potentially painful in more ways than one. The iPad example, al... » read more

Getting Ready For Stacked Die
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ed Sperling The move toward stacking of die has always been a series of disconnected pieces and vague promises for the future, but in the past few months the scenario has changed radically—and so has the commentary. All three of the Big Three EDA vendors now have at least some of the pieces in place for 2.5D stacking and are working on a full 3D flow. Two of the biggest FPGA vendors, A... » read more

Experts At The Table: Designing At 28nm And Beyond
By Ed Sperling - 05 Apr, 2012 - Comments: 0

By Ed Sperling System-Level Design sat down to talk about design at future process nodes with Naveed Sherwani, president and CEO of Open-Silicon; Charles Janac, chairman and CEO of Arteris; Frank Schirrmeister, group director of product marketing for Cadence’s System Development Suite; Behrooz Zahiri, vice president of marketing at Magma (and currently director of marketing at Synopsys), and... » read more

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