Top Tech Videos of 2023

In 2023, heterogeneous integration, RISC-V, and advanced node logic scaling and advanced packaging dominated the semiconductor industry. All of those topics spurred deep discussions at conferences, and they were the subject of Semiconductor Engineering’s most popular videos.

Of the videos published in 2023, here are the highlights from our five channels:

Manufacturing, Packaging & Materials
Test, Measurement & Analytics
Power & Performance
Automotive, Security & Pervasive Computing
Systems & Design

Manufacturing, Packaging & Materials

• High-NA EUV Progress And Problems talks about when this technology will likely show up, what problems still need to be resolved, and what comes next.
• Challenges In Packaging 5G And 6G discusses tradeoffs around antenna in package, antenna on package, flexible circuits, and different substrates.
• Challenges Of Heterogeneous Integration drills into issues ranging from uneven aging, warpage, and different mechanical stresses, plus possible benefits.
• Challenges Of Testing Advanced Packages focuses on issues such as more contacts, different handling requirements, the necessary thermal conditions for test, and variation within the package.
• How Curvilinear Mask Writing Affects Chip Design explains what has to change, the impact on design rules, and why using curvilinear shapes can shrink manufacturing rule decks.

Test, Measurement & Analytics

• Zero Trust Security In Chip Manufacturing looks at why security is becoming so critical in fabs and how to deal with it.
• Total Overlay With Multiple RDLs explains why unexpected problems can develop throughout the whole redistribution layer (RDL) stack.
• Striking A Balance In Acoustic Inspection digs into resolution, frequency, and penetration, where ML is entering the process, and why it’s considered complementary to X-ray inspection.

Power & Performance

• Impact Of Increased IC Performance On Memory delves into the factors that need to be considered to improve reliability as performance is increased, and what needs to be modeled.
• Where Power Is Spent In HBM looks at what can be done to boost performance and reduce power on the memory side, and what the tradeoffs will be.
• Choosing The Right Memory At The Edge focuses on tradeoffs involving cost, bandwidth, power, application, and even the data itself.
• Changes In Memory Design examines the impact of big data applications on density, memory stacking, and growing concerns about reliability and performance per watt.
• Issues In Calculating Glitch Power dives into the causes of glitch, how it is affected by new process nodes and heterogeneous integration, and the impact of different workloads, higher dynamic power, thermal effects, and aging.

Automotive, Security & Pervasive Computing

• Improving PPA When Embedding FPGAs Into SoCs examines what’s changes and why it’s happening now.
• Programmable General-Purpose I/O talks about adding programmability into the general-purpose I/O to enable more flexibility, lower inventory, and reduced obsolescence.
• 100G Ethernet At The Edge explains how the technology requires faster conduits for the data in order to reduce latency, what’s changing at the edge, and why.
• LPDDR Flash In Automotive delves into the new zonal controllers in automotive design and why memory architectures will need to shift to accommodate them.
• Physically Aware NoCs looks at how to shrink the NoC area, improve security, and reduce time to market.
• Die-To-Die Security digs into the impact of heterogeneous integration on security, what the risks are for multi-tenant data centers, and what happens as the expected lifespan of chips increases in mission-critical and safety-critical markets.
• New Approaches To Sensors And Sensing covers new markets for sensors that involve complex power management, radar, increasing amounts of intelligence, and where and how they are likely to be used in the future.
• Adding Security Into Test goes over what happens when devices age, why there is a push to embed configurable security analytics, and how this new technology can be used to alert users to cyberattacks.
• Designing Chips For Outer Space explains how huge temperature swings and increased radioactive particles can cause single-event upsets, transients, functional interrupts, and latch-ups –– and what’s needed to fix a problem after it occurs.

Systems & Design

• Verifying A RISC-V Processor covers the need to verify asynchronous events like interrupts, how to compare a reference model to RTL, and the need for both hardware/software co-design and architectural analysis.
• Multi-Die Integration explains how heterogeneous chips bring challenges around partitioning, layout, and thermal.
• The Impact Of ML On Chip Design looks at how machine learning can be used for everything from optimizing ATPG patterns and analog circuits to improved manufacturing.
• Application-Optimized Processors digs into why processing packets out of order can help optimize performance and power, and when to use voltage and frequency scaling versus clock gating.
• Challenges In Ramping New Manufacturing Processes talks about the steps to determine what can be printed on a wafer, how to reduce defect density, and other concerns.
• RTL Restructuring Issues examines grouping and ungrouping, re-parenting, and breaking connections logically, why logical hierarchy must map to physical hierarchy, and where errors can creep in.
• DSP Techniques For High-Speed SerDes talks about the need for continuous performance improvements in SerDes, PCIe, NRZ, and PAM4, and what else changes as these technologies evolve.
• Coding And Debugging RISC-V outlines steps to develop code for RISC-V designs using a front-end high-level programming language, followed by optimization, to produce an assembly or object file, and looks at what LLVM brings to the table. 2K
• Memory And High-Speed Digital Design goes over how simulation can be applied to solve issues, what to test for, and why new memories make it more difficult to achieve an optimal signal pattern.
• Improving AI Productivity With AI discusses how engineers can utilize AI to push more design elements further left.

For more Semiconductor Engineering videos, check out the full list here.