What Are FeFETs?

The memory market is going in several different directions at once. On one front, the traditional memory types, such DRAM and flash, remain the workhorse technologies in systems despite undergoing some changes in the business. Then, several vendors are readying the next-generation memory types in the market.

As part of an ongoing series, Semiconductor Engineering will explore where the new and traditional memory technologies are heading. In this segment, Stefan Müller, chief executive of Ferroelectric Memory Co. (FMC), sat down with Semiconductor Engineering to discuss memory technology and other topics. Startup FMC is developing ferroelectric FETs (FeFETs), a new memory type. The technology can also be applied to logic. What follows are excerpts of that conversation.

SE: There are several types of memory in the market. For example, NOR flash memory is typically used for code storage in embedded applications. Embedded NOR is used in microcontrollers (MCUs) and other devices. What are the challenges here?

Müller: With respect to existing memory solutions, several hurdles are rising as the industry marches along Moore’s Law. The current embedded NVM or eNVM market is dominated by embedded NOR-type flash, which does the job well and will be around for a long time. However, embedded NOR flash increases in cost on top of the logic base technology, as you scale to more advanced process nodes. As you walk through the technology nodes, especially looking at the poly/SiON to high-k metal-gate (HKMG) transition happening at 32nm, 28nm and 22nm, the challenge is to make regular logic transistors and flash devices co-exist on the same silicon. This grows ever more complex and expensive. Moreover, an embedded NVM technology nowadays has to have the potential to work with a variety of advanced processes and substrates like finFET or FD-SOI. On top of that, due to intrinsic electrostatics, conventional embedded flash or eFlash cells and their high voltage pumps do not scale and remain power hungry during write operations.

SE: What are the challenges with other memory types?

Müller: In the DRAM world, there are significant technological challenges to be overcome, especially when you look at scaling to 1xnm and beyond. DRAM is still based on a 1T-1C memory cell that has trouble scaling, and has a certain cost adder to it due to the stacked capacitor. Moreover, it is obviously volatile and therefore consumes power even in the idle state. Regarding standalone NVM NAND flash, the industry is pushing hard for 3D integration with companies like Samsung, Micron and Toshiba in the lead. is difficult and requires highly customized process flows and fabs. The industry is still learning how to produce 3D NAND in high volume, and is experiencing growing pains transitioning from 2D to 3D.

SE: FMC is developing a new technology called FeFETs. FMC’s memory technology is based on the ferroelectric properties of hafnium oxide. How is FeFET different than a traditional ferroelectric RAM (FRAM)?

Müller: Standard FRAM is based on a 1T-1C memory cell in which the ferroelectric film is implemented in the capacitor. FRAM has not scaled beyond the 130nm technology node due to the fact that only planar capacitors can be used and the traditional ferroelectric films are not scalable. This has prevented traditional FRAM from widespread adoption. In comparison, the hafnium oxide based FeFET from FMC is a totally different memory cell in which the ferroelectric actually replaces the gate dielectric of a CMOS transistor. With the ferroelectric film thicknesses thinned down below 5nm, it is therefore scalable to the latest technology nodes. FMC aims for a new wave of ferroelectric memories finally reaching the long-envisioned entry into mass markets.

SE: FMC is developing a one-transistor (1T) FeFET. What is a FeFET?

Müller: You can think of the FeFET as a logic transistor that can maintain its logic state even when power is removed. In general, you replace the conventional logic gate dielectric with a ferroelectric material, a dielectric that remembers the electric field to which it had been exposed. With FMC’s proprietary hafnium oxide, the standard gate dielectric can be made ferroelectric—even for film thicknesses that compare to the one used in standard logic transistors. This proprietary hafnium oxide integrates extremely well with all current and future processes utilizing HKMG. Therefore, a scalable ferroelectric FET finally becomes possible.

Fig. 1: FeFET (n-type) functionality. When the ferroelectric polarization points downward (left), electrons invert the channel region, permanently bringing the FeFET into the “on” state. If polarization points up (middle), permanent accumulation is created and the FeFET is in the “off” state. Source: FMC.

SE: FeFETs, according to FMC, provide fast switching at low power. FMC says it provides a 1,000X improvement in per-bit write energy. How does it work?

Müller: In FeFETs, a permanent dipole is formed within the gate dielectric itself, splitting the threshold voltage of the ferroelectric transistor into two stable states. Accordingly, binary states can be stored in the FeFETs similar to how it is done in a flash memory cell. However, as the addition of FeFETs to the existent HKMG technology device suite requires only very few masks, eNVM capability is added at much lower cost than eFlash. The voltages required to switch the FeFETs from one state to the other are in the range of 3 to 5 volts, making the technology scalable and reducing the need for high voltage charge pumps. As the switching is solely a field driven effect from a low program voltage, the eNVM requires the theoretically lowest power possible for write operations.

SE: One of the emerging next-generation logic transistor types is called a negative capacitance (NC) FET or NC finFET. An NC FET promises to provide low power and a steep sub-threshold swing. Like FeFETs, NC FETs use ferroelectric and hafnium-based materials with other dopants. GlobalFoundries and others are exploring NC FETs. Can you use your ferroelectric materials to make NC FETs?

Müller: Absolutely. The NC FET is currently gaining significant momentum exactly because of ferroelectric HfO² and the FeFET. The difference in a way is that you have to use a slightly different gate stack; however, still everything can be based on ferroelectric HfO². If NC FET based on ferroelectric HfO² can indeed be implemented, it will be an industry revolution.

SE: What else?

Müller: FMC is currently focusing on FeFET. This is the fundamental prerequisite to also make NC FETs work.

SE: Right now, FMC is focusing on FeFET for memory applications. What are some of the challenges with FeFETs?

Müller: FeFETs face the same barriers as all newly proposed embedded memories—cost, performance, reliability, yield, ease of manufacturability, and customer adoption. FMC thinks that FeFETs are beginning to show significant value versus other existing and new embedded NVM technologies.

SE: FMC is developing FeFET technology with several partners, including GlobalFoundries as well as NaMLab, a materials R&D house. What have you and your partners demonstrated so far?

Müller: GlobalFoundries has already demonstrated fully functional FMC FeFET memory arrays on their high-volume 28nm HKMG process. A joint paper was presented at the December 2016 IEDM conference, which highlighted the performance and reliability. Additional FeFET experiments between GlobalFoundries and FMC are planned during this year.

SE: GlobalFoundries also has talked about integrating FeFET technology within its 22nm FD-SOI platform. What are the targeted markets for FeFETs?

Müller: First and foremost, FMC is aiming at the embedded NVM space. The speed of bringing it into full production will be determined by customer interest and adoption. In general, the concept could also be interesting and feasible for the standalone NVM and DRAM market. However, these are not the focus markets for FMC.

SE: Will you work with other foundries besides GlobalFoundries on FeFETs?

Müller: FMC is currently only engaged with GlobalFoundries. However, we do anticipate that FeFET technology will be widely deployed through multiple manufacturing partners.

SE: To make FeFETs in the fab, do you need special equipment? Or can you use existing equipment?

Müller: Any HKMG fab should, in principle, be capable of manufacturing FeFET. There is no dedicated equipment required to start development. However, in order to ramp FeFET to production, modifications to existing tools and tool optimizations might be required depending on the respective fab.

SE: Briefly, how do you make FeFETs?

Müller: As published at this year’s IEDM, currently only two additional masks are required for embedding FeFET next to standard CMOS logic. Since FMC’s FeFETs are actually derived from the CMOS baseline process, the ease of integration is a major advantage for FeFETs when compared to other emerging memory technologies.

SE: Is it challenging or expensive to make FeFETs in the fab?

Müller: FMC has acquired significant know-how over the past several years to overcome the FeFET challenges.

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