Blog Review: Jan. 28

Synopsys’ Dana Neustadter and Vincent van der Leest argue that a hardware-based approach to security is required to fully address the risks introduced by modern AI architectures and the distributed workloads they support.

Siemens EDA’s Tova Levy examines multiphysics challenges in 3D-IC designs and outlines three design imperatives to identify risks earlier and support PPA, reliability, and yield targets for next-gen AI systems.

Cadence’s Reela Samuel looks at the specific impacts that bringing memory closer to compute with 3D-IC technology could have on AI acceleration, HPC, 5G infrastructure, edge computing, and automotive electronics.

Imagination’s Ed Plowman suggests that one of the best ways to know where graphics technology is going is to watch the console market, where compute and graphics processing are converging and AI acceleration is deployed to keep visual quality high under resource and cost constraints.

Lam Research’s David Haynes explains why silicon photonics has the potential to provide dramatic improvements in speed and efficiency over traditional electrical interconnects and notes some of the challenges in implementation and scaling.

Arm’s Alexey Vilkin, Alex Tawse, Kshitij Sisodia, and George Gekov present an end-to-end workflow to train, quantize, and deploy an int8 Conformer speech model on Arm embedded platforms using ExecuTorch.

Keysight’s Majid N. Aziz points to simulating EV range and energy consumption patterns at the system level during the design phase to provide more accurate predictions of range performance under harsh or extreme conditions.

Ansys’ Aliyah Konarkowski checks out how computational modeling and simulation, AI, and digital twins combine to determine how cardiovascular systems respond to treatments or medical devices in a virtual environment.

SEMI’s Paul Trio shares what’s new in standards development, including the Digital Twins in Manufacturing Task Force and an effort to address fab downtime caused by voltage sags.

Plus, check out the blogs featured in the latest Low Power-High Performance and Manufacturing, Packaging & Materials newsletters:

Alua Suleimenova, SEMI blogger and senior sustainability lead at Marvell, digs into a new report about the impact of fabs built in places with high water stress.

Siemens’ Harry Foster finds abstractions are breaking down as modern system design brings together components that were once isolated.

Synopsys’ Manoz Palaparthi examines some thorny signal integrity problems in advanced chip design.

Rambus’ Nidish Kamath explains why memory throughput and efficiency are now just as critical as raw compute.

Mixel’s Michael Nagib and Xpressphy’s Nuno Martins dig into enhanced performance and flexibility for the next generation of high-speed camera and display communication.

Arm’s Alan Hayward looks at streamlined garbage collector scanning and improved runtime behavior for new memory-intensive applications.

Cadence’s Veena Parthan shows how to make ocean shipping more sustainable by converting the pitching motion of a ship into thrust.