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Micro-Architectural Exploration for Low Power Design
By Abhishek Ranjan - 14 Jan, 2016 - Comments: 0

In the first part of this series, we had discussed the need to perform power optimizations and exploration at higher levels of abstractions where the potential to reduce the power consumption is highest. We presented the need for making coarser changes at higher level of abstractions to exploit full power saving potential. In the second part, we discussed some very potent micro-architectural te... » read more

Micro-Architectural Exploration For Low Power Design
By Abhishek Ranjan - 10 Dec, 2015 - Comments: 0

By Abhishek Ranjan, Saurabh Shrimal and Sanjiv Narayan In the first part of this series, we discussed the need to perform power optimizations and exploration at higher levels of abstractions, where the potential to reduce the power consumption was highest. While fine-grained local changes (like clock-gating, operand isolation, etc.) for power reduction are well understood and widely adopted,... » read more

Micro-Architectural Exploration For Low Power Design
By Abhishek Ranjan - 12 Nov, 2015 - Comments: 0

By Abishek Ranjan, Saurabh Shrimal and Sanjiv Narayan The adoption of finFET technology has created a tectonic shift in the chip design landscape. In addition to better performance (within the same power envelope) and higher reliability, finFETs have significantly reduced the leakage power at smaller technology nodes. At the same time, the share of dynamic power dissipation continues to rise... » read more

Raising The IQ Of Your MEMS-Based IC Design Flow
By Nicolas Williams - 15 Oct, 2015 - Comments: 0

By Nicolas Williams and Qi Jing Internet of Things (IoT) applications depend on smart objects that interact with the real world. So your IoT project is likely to contain ICs that integrate micro electro-mechanical systems (MEMS), such as accelerometers, pressure sensors, motors, and microphones that acquire data for analysis. These projects are finding their way into automobiles, phones, and... » read more

How To Speed Up Networking Design Verification
By Lauro Rizzatti - 10 Sep, 2015 - Comments: 0

The enormous growth of the Internet of things (IoT) has an enormous impact on network providers. After all, without the underlying network infrastructure, there would be no IoT. One consequence has been a significant increase in the number of Ethernet ports on networking devices. Today, Ethernet switches and routers reach 256 ports (by year’s end that number will increase to 1024 ports), a... » read more

How To Fix Common Power Problems
By Arvind Narayanan - 13 Aug, 2015 - Comments: 0

As the industry moves to ever more advanced technology nodes, managing power has emerged as a primary challenge in modern SoC design. With smaller nodes, the wires become taller and narrower, which increases the resistivity and leads to more pronounced voltage drop effects. Electro-migration effects are also more severe at advanced nodes, causing serious reliability concerns. Both RTL synthesis... » read more

How To Get The Most Power While Being Cool To The Touch
By Robin Bornoff - 09 Jul, 2015 - Comments: 0

Traditional electronics thermal management in high power applications such as telecommunication, networking, and computing involves keeping the operating junction temperatures at, or below, maximum rated values for the intended application, often with fans, blowers, heatsinks, etc. Mobile consumer electronics also have to be thermally managed to ensure that when a person uses the product, ‘to... » read more

The Old Two-Step Just Doesn’t Have That Swing
By Lauro Rizzatti - 16 Jun, 2015 - Comments: 0

Power analysis has quickly become equally as important as functional verification for today's power-hungry SoCs. Yet, until now, it was not possible to fully analyze dynamic power in very large SoCs running embedded software. That day has finally arrived with new emulation platform software that overcomes the intrinsic shortcomings of the current two-step power estimation tools. The current ... » read more

Correct-By-Design Methodology Requires Carefully Defined Constraints
By John McMillan - 14 May, 2015 - Comments: 0

Since the dawn of PCB usage, constraints have been an important part of the design. What are the dimensions? What weight of copper? Now, constraints have become much more than just physical dimensions. The most important constraints are defined by the design requirements of differential pairs, BGAs, low voltage devices, and high-speed parallel interfaces. The cost of rework skyrockets the fu... » read more

The Power Estimation Challenge
By Lauro Rizzatti - 09 Apr, 2015 - Comments: 0

If you wonder how important low power is in chip design today, consider the recent news in the blogosphere reporting the controversy surrounding Qualcomm’s Snapdragon 810 SoC — the company’s first flagship 64-bit chip, which will most likely power the top Android devices released in 2015. The story broke in early December along the lines that the 810 had problems with overheating. Whet... » read more

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