Power Delivery Networks


By Preeti Gupta That power is now at the forefront of semiconductor design is no secret. It is also true that lowering power consumption drives product competitiveness and green technology—even more so in today’s mobile-driven market. But the same drive for lower power also increases the complexity of ensuring the power integrity of a system-on-chip (SoC). The power delivery network (PD... » read more

Speed Demons


By Barry Pangrle For extreme world record performance levels, the required power levels are also typically extreme. It’s that age-old battle against diminishing returns to squeeze out every last drop of performance versus practical limits and wallets. For example, a top fuel dragster can consume about six gallons of fuel for a quarter-mile run down the strip. As has previously been shown ... » read more

Bridging The Gap


We talk all the time about hardware/software co-design, co-verification, etc., but what is really interesting now is how vital the connection is between power awareness and system-level design. Yes, it sounds obvious, but so far this is an untapped market with ideas still being batted around. As discussed in Parts 1, 2 and 3 of my article series on energy and power, to achieve the best power... » read more

Buzzwords: Dead or Alive?


By Tiffany Sparks “Time-to-market” and “time-to-volume” – are they overused marketing buzzwords? Until recently, I would have argued yes. After all, it seems like very few solutions in the semiconductor supply chain are not marketed along the lines of addressing time-to-volume or time-to-market challenges. But just because buzzwords become trite, it doesn’t mean they aren’t st... » read more

Power Intent Formats: Isolation


By Luke Lang Last month, I discussed power domain for all three power formats: CPF, UPF 1.0, and IEEE 1801. I mentioned isolation but mainly used it to explain power domain. This month’s blog will address isolation in detail. First, isolation cells are required at off-to-on domain crossings. When a domain is shut off, all of its output nets become undriven. If these floating nets drive direct... » read more

Innovation At The Core


By Barry Pangrle A number of next-generation ARM-based multi-core systems are starting to show up in the press. Nvidia has released information on its upcoming Tegra 3 (also known as “Kal El”). At last week’s ARM Techcon in Santa Clara, ARM gave several presentations around its Cortex-A7 (Kingfisher) and Cortex-A15 (Eagle) architectures and collectively about its big.LITTLE strategy. Qua... » read more

More EMI Mitigation


With electromagnetic interference a major design challenge today in any product that sends or receives a signal, determining how to lessen the impact of this phenomenon was addressed to a large extent in my article, “EMI Cuts a Wide Swath,” but there are a few additional techniques that are important to highlight. Erick Olsen, marketing director at NXP explained that higher performance c... » read more

The Bigger Picture


By Aveek Sarkar IC power consumption is dependent on its supply voltage. To reduce power consumption, and heat dissipation, IC designers strive to design for lower supply voltages. But the threshold voltage that controls switching in digital CMOS devices hasn't scaled accordingly from reliability and other considerations. As the supply voltage reduces down close to the threshold voltage of ... » read more

Noise Coupling Analysis


By Arvind Shanmugaval Integrating digital and mixed-signal IP blocks in SoCs poses a considerable challenge to verification of power/ground and substrate noise. Traditional methods of power supply noise analysis are unable to meet the demands of today’s highly integrated designs with multiple low- power design techniques. Existing methods also do not provide sufficient capacity or the capabi... » read more

Power Intent Formats: Power Domain


By Luke Lang Starting this month, I will be writing a series of blogs inspired by “Dueling Power Formats”. The article correctly points out that there are currently three power formats: CPF, UPF 1.0, and IEEE 1801. Some designers will find themselves in a position of having to choose a format. Others will need to work with both formats. Regardless of which position one is in, these LP desi... » read more

← Older posts Newer posts →