Unlocking Clarity: Keyphrase Trees Bring Structure To AI Text Analysis


By Amr Hegazy, Mohamed Abdelkarim, and Reem El Adawi In the vast digital landscape of information, from intricate design specifications to extensive patent literature and complex verification reports, extracting meaningful insights often feels like searching for a needle in a haystack. This challenge is particularly acute in the semiconductor industry, where critical details are buried with... » read more

Advanced Packaging: A Key Technology For The Next Generation Of Electronics


In recent years, advanced packaging has become much more important. While semiconductor manufacturers used to focus primarily on miniaturization and increasing the performance of individual chips, the focus is increasingly shifting to the system level: How can processor cores, memory, sensors, and wireless modules be integrated as efficiently, compactly, and powerfully as possible within a sing... » read more

Integrated Modular Firmware Solutions: A Vital Component Of Custom Silicon Chiplet Architecture Designs


By Marc Meunier and Srini Narayana The shift from monolithic SoC designs to chiplet-based architecture isn’t just a packaging innovation. It’s a fundamental rethinking of how custom silicon is designed, manufactured, and deployed. This transition is driven by the growing impracticality of scaling large monolithic dies at advanced nodes. As die sizes increase, so do the costs, yield ri... » read more

Achieving Reliable 2m+ DAC Connectivity For AI Scale Networks With 224G PHY IP


As artificial intelligence workloads and hyperscale data centers continue to evolve, the requirements for networking infrastructure are becoming increasingly stringent. High-speed, reliable connectivity is essential to support the massive data flow and low-latency demands of AI-scale environments. Passive direct attach copper (DACs) remains an attractive choice for hyperscalers and system vendo... » read more

GDDR7 Tackles Massive-Context AI Inference


The AI hardware landscape is evolving at breakneck speed, and memory technology is at the heart of this transformation. NVIDIA’s recent announcement of Rubin CPX, a new class of GPU purpose-built for massive-context inference, underscores this trend. Rubin CPX is designed to tackle workloads that require reasoning across millions of tokens. Use cases include long-form generative video, comple... » read more

Overflowing Zoo: The Power Of Compilers


The term “model zoo” first gained prominence in the world of Artificial Intelligence/Machine Learning (AI/ML) beginning in the 2016-2017 timeframe. Originally used to describe open-source public repositories of working AI models — the most prominent of which today is Hugging Face — the term has since been adopted by nearly all vendors of AI chips and licensable Neural Processors Units (... » read more

Developing Next-Generation Integrated Optical Engines


By Susan Coleman and Emily Gerken Data demand is soaring worldwide as high-resolution video streaming, virtual reality, the Internet of Things (IoT), high-performance computing (HPC), and artificial intelligence and machine learning (AI/ML) drive an insatiable appetite for data. As a result, networks and data centers face increasing pressure to expand bandwidth, reduce latency, and lower pow... » read more

LPDDR: A Versatile Memory Powering The Next Wave Of Mobile, Edge & Endpoint Computing


The world of computing is evolving at a breakneck pace. From smartphones and ultra-thin laptops to autonomous vehicles and edge AI devices, the demand for memory that balances performance, power efficiency, and compact form factors has never been greater. This shift is driven by a few undeniable trends, including the increased deployment of AI models across verticals at the edge and higher us... » read more

The Need for System-Technology Co-Optimization (STCO)


Modern semiconductor components are becoming more and more complex and cost sensitive. To master technological and economic challenges, new chiplet approaches and heterogeneous integration technologies are becoming increasingly relevant. This, in turn, calls for new heterogeneous design approaches. They make it possible to combine different design domains across technological options while sati... » read more

From Discovery To High-Speed Delivery: A Unified Verification Approach For UCIe 3.0 Features And Manageability


By Ujjwal Negi and Prashant Dixit The Universal Chiplet Interconnect Express (UCIe) standard is redefining multi-die integration, enabling high-performance, scalable connections between heterogeneous chiplets. UCIe 2.0 introduced a dedicated manageability layer — a control plane for configuring, monitoring, and coordinating chiplet management elements independently from mainband and sideba... » read more

← Older posts Newer posts →