category: Blogs – LPHP

category: Auto, Security & Edge AI

Developing Next-Generation Integrated Optical Engines
By Susan Coleman - 16 Oct, 2025 - Comments: 0

By Susan Coleman and Emily Gerken Data demand is soaring worldwide as high-resolution video streaming, virtual reality, the Internet of Things (IoT), high-performance computing (HPC), and artificial intelligence and machine learning (AI/ML) drive an insatiable appetite for data. As a result, networks and data centers face increasing pressure to expand bandwidth, reduce latency, and lower pow... » read more

LPDDR: A Versatile Memory Powering The Next Wave Of Mobile, Edge & Endpoint Computing
By Raj Uppala - 11 Sep, 2025 - Comments: 0

The world of computing is evolving at a breakneck pace. From smartphones and ultra-thin laptops to autonomous vehicles and edge AI devices, the demand for memory that balances performance, power efficiency, and compact form factors has never been greater. This shift is driven by a few undeniable trends, including the increased deployment of AI models across verticals at the edge and higher us... » read more

The Need for System-Technology Co-Optimization (STCO)
By Benjamin Prautsch - 11 Sep, 2025 - Comments: 0

Modern semiconductor components are becoming more and more complex and cost sensitive. To master technological and economic challenges, new chiplet approaches and heterogeneous integration technologies are becoming increasingly relevant. This, in turn, calls for new heterogeneous design approaches. They make it possible to combine different design domains across technological options while sati... » read more

From Discovery To High-Speed Delivery: A Unified Verification Approach For UCIe 3.0 Features And Manageability
By Ujjwal Negi - 11 Sep, 2025 - Comments: 0

By Ujjwal Negi and Prashant Dixit The Universal Chiplet Interconnect Express (UCIe) standard is redefining multi-die integration, enabling high-performance, scalable connections between heterogeneous chiplets. UCIe 2.0 introduced a dedicated manageability layer — a control plane for configuring, monitoring, and coordinating chiplet management elements independently from mainband and sideba... » read more

Rethinking AI Infrastructure: The Rise Of PCIe Switches
By Vanessa Do - 11 Sep, 2025 - Comments: 0

When thinking of AI, images of futuristic robots or self-driving cars may come to mind. What might not come to mind are the unsung hardware component heroes that are quietly enabling such complex systems. Among these, PCI Express (PCIe) switches might seem to be a boring topic to write about, much less read. But here's the twist—they are nothing short of revolutionary when it comes to empower... » read more

How Neural Super Sampling Works: Architecture, Training, And Inference
By Liam O'Neil - 11 Sep, 2025 - Comments: 0

This blog post is the second in our Neural Super Sampling (NSS) series. The post explores why we introduced NSS and explains its architecture, training, and inference components. In August 2025, we announced Arm neural technology that will ship in Arm GPUs in 2026. The first use case of the technology is Neural Super Sampling (NSS). NSS is a next-generation, AI-powered upscaling solution. ... » read more

Modern Factories Thrive By Manufacturing Smarter With Simulation
By Jennifer Procario - 11 Sep, 2025 - Comments: 0

By Jennifer Procario and Peter Slättman Automation induces anxiety in those who fear that technology will replace humans in the workforce. But as we transition from Industry 4.0 to 5.0, some apprehension could be alleviated with a shift in focus. The fourth industrial revolution centered on technology, but the fifth emphasizes human interaction and collaboration with technology. The Europ... » read more

System-Level Design For 1.6 Tbps Interoperability In AI Data Centers
By Madhumita Sanyal - 14 Aug, 2025 - Comments: 0

By Madhumita Sanyal and Diwakar Kumaraswamy The rapid escalation of AI/ML workloads—driven by increasingly large language models—is reshaping high-performance computing and AI data center architectures. Real-time inference and large-scale training are pushing the limits of compute and interconnect performance. With model sizes and parameter counts doubling every 4–6 months, infrastruct... » read more

Moving Past “It Works” — Intelligent Optimization Is the Key to PCB Excellence
By Shivani Joshi - 14 Aug, 2025 - Comments: 0

In the fast-evolving field of electronic systems design, engineers are under increasing pressure to deliver innovative, high-performance products within ever-shrinking development cycles. Traditional methods—relying on intuition, trial-and-error testing, and even basic simulation—struggle to keep pace with the growing complexity of modern systems. Nowhere is this more evident than in printe... » read more

Maximize Uptime And Improve TCO: RAS And Telemetry In HBM4 For Data Centers
By Raj Uppala - 14 Aug, 2025 - Comments: 0

As AI workloads scale and data center operations become increasingly complex, it is critical to keep the infrastructure up and running. Total Cost of Ownership (TCO) is a key metric that includes not only the upfront cost of hardware but also the ongoing expenses of power, cooling, maintenance, and—most importantly—downtime. A single memory failure in a hyperscale AI cluster can cascade int... » read more

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