category: Blogs – LPHP

category: Auto, Security & Edge AI

Rethinking The Role Of CPUs In AI: A Practical RAG Implementation
By Odin Shen - 11 Dec, 2025 - Comments: 0

In many enterprise environments, engineers and technical staff need to find information quickly. They search internal documents such as hardware specifications, project manuals, and technical notes. These materials are often scattered, making traditional search inefficient. These documents are often confidential or proprietary. This constraint prevents these documents from being processed by... » read more

Harness Simulation To Connect To Industry 5.0
By Scott Parent - 11 Dec, 2025 - Comments: 0

Industry 5.0 represents a significant evolution in industrial processes, focusing on integrating human-centric approaches with advanced technologies. Unlike Industry 4.0, which emphasizes automation and digitalization, Industry 5.0 prioritizes collaboration between humans and technology. This approach broadens the scope of industrial advancements to include societal contributions alongside prod... » read more

Streamlining DO-254 Compliance: The Power Of Automated Clock-Domain Crossing Verification
By Kurt Takara - 11 Dec, 2025 - Comments: 0

In the realm of safety-critical electronic hardware, particularly those governed by DO-254 compliance directives, ensuring design integrity is paramount. One of the most insidious challenges designers face is clock-domain crossing (CDC) violations. When data moves between asynchronous clock domains, it can lead to metastability issues, causing unpredictable behavior, data loss or corruption, an... » read more

Opportunities And Challenges With Open-Source Hardware In System Development
By Roland Jancke - 13 Nov, 2025 - Comments: 0

For many years now, there has been a trend toward open source in the field of system development. It can be seen in software libraries for the product itself as well as in development tools. A clear motivation for open source lies in the fact that not charging license fees makes a product more attractive on the market. It may also enable further development of the software component, dependi... » read more

Scaling AI Infrastructure: The Critical Role Of PCIe 7.0 Retimers
By Lou Ternullo - 13 Nov, 2025 - Comments: 0

In a previous blog, Scaling in the AI Era: The Role of PCI Express 7.0 Switches in Next-Gen Data Centers, we explored how PCIe 7.0 switches enable high-bandwidth, low-latency interconnects for AI-driven data centers. Switches are essential for building flexible, composable architectures that connect thousands of GPUs, accelerators, and memory subsystems. But as AI clusters grow in size and comp... » read more

Accellera Standard Supports Hierarchical Data Model For CDC And RDC Analysis
By Farhad Ahmed - 13 Nov, 2025 - Comments: 0

The hierarchical flow for clock domain crossing (CDC) and reset domain crossing (RDC) is a methodology used in the verification of large, complex digital integrated circuits. It's a divide-and-conquer approach that significantly improves the efficiency and turnaround time for ensuring design reliability against metastability and other issues at asynchronous boundaries. Questa CDC and RDC sol... » read more

Predictable Design Optimization And Closure With Adaptive Scenario Compression
By James Chuang - 13 Nov, 2025 - Comments: 0

Modern semiconductor chip design faces growing complexity due to numerous timing scenarios driven by varying operating conditions and physical effects. This complexity is especially pronounced in mobile and automotive chips, which require optimization across diverse performance and reliability demands. Designers currently focus on a limited subset of scenarios to manage computational load, but ... » read more

Future Architecture Technologies: POE2 And vMTE
By Martin Weidmann - 13 Nov, 2025 - Comments: 0

Future Architecture Technologies are features being developed for currently unreleased versions of the Arm architecture. Arm provides the ecosystem with relevant information and specifications in advance, ensuring software support for when new technologies are realized in hardware. This blog introduces two future technologies: Permission Overlay Extension version 2 (POE2), and Virtual T... » read more

PCIe Low-Power Validation Challenges And Potential Solutions
By Kunal Chhabriya - 13 Nov, 2025 - Comments: 0

As chip complexities increase and the industry evolves to more battery-powered devices, power-aware/consumption research becomes an integral part of design in the industry. Low power is crucial in ASIC applications to ensure longevity, durability, and reliability. PCI-SIG has focused on reducing power consumption while the PCIe interface is active to enable better platform power management (... » read more

The Future Of Digital Engineering In The Age Of AI
By Laura Carter - 13 Nov, 2025 - Comments: 0

Digital engineering gives innovators creative agency to test the limits of their ideas in a virtual environment. It is in this convergence of digital technologies, data-driven models, and advanced simulations where new designs are born at unprecedented levels of speed and accuracy. Adding artificial intelligence (AI) into the mix further accelerates innovation by unlocking opportunities to a... » read more

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