category: System-Level Design

category: Auto, Security & Edge AI

Thomas Dolby’s Very Different View Of Progress
By Ann Mutschler - 16 Oct, 2019 - Comments: 4

Thomas Dolby’s hit songs “She Blinded Me with Science” and “Hyperactive!” catapulted him to international fame in the early '80s as a pioneer of New Wave and Electronica by combining a love for invention with a passion for music. The result defined an era of revolutionary music. As record company politics began to overshadow the joy of performing, Dolby turned his attention to Holl... » read more

Extending Portable Stimulus
By Brian Bailey - 16 Oct, 2019 - Comments: 0

It has been a year since Accellera's Portable Test and Stimulus Specification became a standard. Semiconductor Engineering sat down to discuss the impact it has had, and the future direction of it, with Larry Melling, product management director for Cadence; Tom Fitzpatrick, strategic verification architect for Mentor, a Siemens Business; Tom Anderson, technical marketing consultant for OneSpin... » read more

Blog Review: Oct. 16
By Jesse Allen - 16 Oct, 2019 - Comments: 0

Arm's Greg Yeric dives into the challenges facing the semiconductor industry and potential solutions that could possibly have huge impacts toward the year 2030, from DNA self-assembly to new physics, in an adaptation of his wide-ranging Arm TechCon keynote. Cadence's Paul McLellan considers Google's recent quantum computing achievement, what quantum supremacy really means, and where it leave... » read more

Week In Review: Design, Low Power
By Jesse Allen - 11 Oct, 2019 - Comments: 0

M&A Dialog Semiconductor will acquire Creative Chips for approximately $80 million cash, with contingent consideration of up to $23 million. The move will expand Dialog's Industrial IoT portfolio, adding Creative Chips' industrial Ethernet and other mixed-signal products for connecting large numbers of IIoT sensors to industrial networks. Based in Bingen, Germany, Creative Chips was founded in... » read more

Blog Review: Oct. 9
By Jesse Allen - 09 Oct, 2019 - Comments: 0

In a video, Cadence's Tom Hackett continues his introduction to finite element analysis (FEA) and the important role it can play in electronics deign. Mentor's Colin Walls considers dynamic memory allocation in real-time operating systems and the problems of non-deterministic behavior and ill-defined failure modes. Synopsys' Taylor Armerding contends that ethical hackers are a necessary p... » read more

Week In Review: Design, Low Power
By Jesse Allen - 04 Oct, 2019 - Comments: 0

Synopsys completed its acquisition of QTronic GmbH, a provider of simulation, test tools, and services for automotive software and systems development. Terms of the deal were not disclosed. Synopsys launched the PrimeECO design closure solution, a signoff-driven solution that the company says achieves signoff closure with zero iterations. The tool includes a machine-learning-driven Hybrid Ti... » read more

Solving The Memory Bottleneck
By Brian Bailey - 04 Oct, 2019 - Comments: 4

Chipmakers are scrambling to solve the bottleneck between processor and memory, and they are turning out new designs based on different architectures at a rate no one would have anticipated even several months ago. At issue is how to boost performance in systems, particularly those at the edge, where huge amounts of data need to be processed locally or regionally. The traditional approach ha... » read more

Blog Review: Oct. 2
By Jesse Allen - 02 Oct, 2019 - Comments: 0

In a video, Cadence's Tom Hackett explains finite element analysis by looking at a simple model of a bridge and showing why FEA techniques are required for analysis of real-world structures. Synopsys' Taylor Armerding examines why the 156-year-old False Claims Act has new relevance when companies are accused of failing to meet cybersecurity standards. Mentor's Colin Walls demystifies memo... » read more

Week In Review: Design, Low Power
By Jesse Allen - 27 Sep, 2019 - Comments: 0

eSilicon debuted its 7nm high-bandwidth interconnect (HBI)+ PHY IP, a special-purpose hard IP block that offers a high-bandwidth, low-power and low-latency wide-parallel, clock-forwarded PHY interface for 2.5D applications such as chiplets. HBI+ PHY delivers a data rate of up to 4.0Gbps per pin. Flexible configurations include up to 80 receive and 80 transmit connections per channel and up to 2... » read more

The Great Data Flood Ahead
By Ed Sperling - 26 Sep, 2019 - Comments: 1

The number of devices connected to the Internet is expected to exceed 1 trillion devices over the next decade or so. The timeline is a bit fuzzy, in part because no one is actually counting all of these devices, but the implications are pretty clear. A data deluge of biblical proportions is headed our way, and so far no one has any idea of what to do with all of it. From a system-level s... » read more

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