category: Technical Papers

category: Auto, Security & Edge AI

Overview of ALD-Driven Oxide Semiconductors for High Density, Low Power Memory Architectures (Hanyang Univ., imec)
By Technical Paper Link - 25 Jan, 2026 - Comments: 0

A new technical paper titled "Oxide Semiconductor for Advanced Memory Architectures: Atomic Layer Deposition, Key Requirement and Challenges" was published by researchers a Hanyang University and imec. Abstract "Oxide semiconductors (OSs), introduced by the Hosono group in the early 2000s, have evolved from display backplane materials to promising candidates for advanced memory and logic ... » read more

Better Contact Resistance in Top-Gate CNFETs through Self-Aligned MoOx Nanoparticle Contact Doping (NYCU et al.)
By Technical Paper Link - 24 Jan, 2026 - Comments: 0

A new technical paper titled "Improving Contact Resistance in Top-Gate Carbon Nanotube Transistor through Self-Aligned MoOx Nanoparticle Contact Doping" was published by researchers at National Yang Ming Chiao Tung University and National Center for Instrumentation Research. "Carbon nanotubes (CNTs) are promising candidates for next-generation back-end-of-line (BEOL) compatible devices due t... » read more

Overview and Comparison of Devices Used For Optical Waveguide-to-Waveguide Coupling (MIT et al.)
By Technical Paper Link - 24 Jan, 2026 - Comments: 0

A new technical paper titled "Advances in waveguide to waveguide couplers for 3D integrated photonic packaging" was published by researchers at MIT and Bridgewater State University. Abstract "In this paper, we provide an overview and comparison of devices used for optical waveguide-to-waveguide coupling including inter-chip edge couplers, grating couplers, free form couplers, evanescent cou... » read more

Outlier-aware Quantization Framework Co-designed With Heterogeneous NVM For SLM Deployment on Edge Platforms (UCSD et al.)
By Technical Paper Link - 24 Jan, 2026 - Comments: 0

  A new technical paper titled "QMC: Efficient SLM Edge Inference via Outlier-Aware Quantization and Emergent Memories Co-Design" was published by researchers at University of California San Diego and San Diego State University. Abstract "Deploying Small Language Models (SLMs) on edge platforms is critical for real-time, privacy-sensitive generative AI, yet constrained by memory, ... » read more

Confidentiality-preserving Framework For Secure On-Chip Communication in NoC Architectures
By Technical Paper Link - 24 Jan, 2026 - Comments: 0

A new technical paper, "Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures," was published by researchers at University of Florida. Abstract "Ensuring Network-on-Chip (NoC) security is crucial to design trustworthy NoC-based System-on-Chip (SoC) architectures. While there are various threats that exploit on-chip communication vulnerabilities, eavesdrop... » read more

A Verification Framework For Trojan Detection (U. of Kansas, U. of Florida)
By Technical Paper Link - 23 Jan, 2026 - Comments: 0

A new technical paper "COVERT: Trojan Detection in COTS Hardware via Statistical Activation of Microarchitectural Events" was published by researchers at University of Kansas and University of Florida. Abstract "Commercial Off-The-Shelf (COTS) hardware, such as microprocessors, are widely adopted in system design due to their ability to reduce development time and cost compared to custom ... » read more

A Novel Side-channel Attack That Utilizes Memory Re-orderings (U. of Washington, Duke, UCSC et al.)
By Technical Paper Link - 21 Jan, 2026 - Comments: 0

A new technical paper titled "Memory DisOrder: Memory Re-orderings as a Timerless Side-channel" was published by researchers at University of Washington, Duke University, UC Santa Cruz, Raytheon and Microsoft Research. Abstract "To improve efficiency, nearly all parallel processing units (CPUs and GPUs) implement relaxed memory models in which memory operations may be re-ordered, i.e., ex... » read more

Scaling of 2D Semiconductor Nanoribbons for High Performance Transistors (Purdue, NUS et al.)
By Technical Paper Link - 21 Jan, 2026 - Comments: 0

A new technical paper titled "Scaling of Two-Dimensional Semiconductor Nanoribbons for High-Performance Electronics" was published by researchers at Purdue University, National University of Singapore, Nexstrom Pte. Ltd and Dankook University. Abstract "Monolayer transition metal dichalcogenide (TMD) field-effect transistors (FETs), with their atomically thin bodies, are promising candida... » read more

Co-optimization Approaches For Reliable and Efficient AI Acceleration (Peking University et al.)
By Technical Paper Link - 21 Jan, 2026 - Comments: 0

A new technical paper titled "The Quest for Reliable AI Accelerators: Cross-Layer Evaluation and Design Optimization" was published by researchers at Peking University and Beijing Advanced Innovation Center for Integrated Circuits. Abstract "As the CMOS technology pushes to the nanoscale, aging effects and process variations have become increasingly pronounced, posing significant reliabilit... » read more

Non-volatile Ferroelectric Silicon Photonics As A Scalable, Heat-free Platform For Energy-efficient Photonic Computing (UPV, iPronics et al.)
By Technical Paper Link - 21 Jan, 2026 - Comments: 0

A new technical paper titled "High-Speed Non-Volatile Barium Titanate Field Programmable Photonic Gate Array" was published by researchers at Universitat Politècnica de València, iPronics Programmable Photonic, Lumiphase, University of West Attica and CEA-Leti. Abstract "Programmable integrated photonics aims to replicate the versatility of field-programmable gate arrays in the optical ... » read more

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