Interplay Between the Row Hammer Effect and Floating Body Effect in Monolithic 3D Stackable 1T1C DRAM (Georgia Tech)


A new technical paper titled "Row Hammer Effect and Floating Body Effect of Monolithic 3D Stackable 1T1C DRAM" was published by researchers at Georgia Institute of Technology. Abstract "Monolithic 3D stackable 1T1C DRAM technology is on the rise, with initial prototypes reported by the industry. This work presents a comprehensive reliability study focusing on the intricate interplay between... » read more

3D Imaging Buried Interfaces In Twisted Oxide Moirés (Cornell, SLAC, Stanford et al.)


A new technical paper titled "Mind the Gap -- Imaging Buried Interfaces in Twisted Oxide Moirés" was published by researchers at Cornell University, SLAC National Accelerator Laboratory, Stanford University, USC, North Carolina State University, University of Chicago, Institute for Basic Science and POSTECH. Abstract "The ability to tune electronic structure in twisted stacks of layered, t... » read more

Silicon Photonic Interconnected Chiplets With Computational Network And IMC For LLM Inference Acceleration (NUS)


A new technical paper titled "PICNIC: Silicon Photonic Interconnected Chiplets with Computational Network and In-memory Computing for LLM Inference Acceleration" was published by researchers at the National University of Singapore. Abstract "This paper presents a 3D-stacked chiplets based large language model (LLM) inference accelerator, consisting of non-volatile in-memory-computing proces... » read more

Free-Space Gated Transistor In Wide Bandgap And Ultra Wide Bandgap Semiconductors (KAUST Et Al.)


A new technical paper titled "Lateral Semiconductor–Free-Space Gate Transistors" was published by researchers at KAUST and the Indian Institute of Technology. Abstract "We introduce a novel lateral transistor architecture, the semiconductor−free-space gate transistor (SFGT), in which the conventional solid dielectric is replaced by a semiconductor−free-space gate configuration with su... » read more

Study of Compute Efficiency And Density Of 3 Photonic Computing Architectures (IBM et al.)


A new technical paper titled "A Case Study on the Performance Metrics of Integrated Photonic Computing" was published by researchers at IBM Research – Europe, University of Heidelberg and University of Münster. Abstract "Photonic processors use optical signals for computation, leveraging the high bandwidth and low loss of optical links. While many approaches have been proposed, including... » read more

Balancing Leakage Reduction with Correctness Preservation in RTL Code Generation (Univ. of Central Florida)


A new technical paper titled "CircuitGuard: Mitigating LLM Memorization in RTL Code Generation Against IP Leakage" was published by researchers at University of Central Florida. Abstract "Large Language Models (LLMs) have achieved remarkable success in generative tasks, including register-transfer level (RTL) hardware synthesis. However, their tendency to memorize training data poses critic... » read more

Algorithm–HW Co-Design Framework for Accelerating Attention in Large-Context Scenarios (Cornell)


A new technical paper titled "LongSight: Compute-Enabled Memory to Accelerate Large-Context LLMs via Sparse Attention" was published by researchers at Cornell University. Abstract "Large input context windows in transformer-based LLMs help minimize hallucinations and improve output accuracy and personalization. However, as the context window grows, the attention phase increasingly dominates... » read more

Co-Optimizing GPU Architecture And SW To Enhance Edge Inference Performance (NVIDIA)


A new technical paper titled "EdgeReasoning: Characterizing Reasoning LLM Deployment on Edge GPUs" was published by researchers at NVIDIA. Abstract "Edge intelligence paradigm is increasingly demanded by the emerging autonomous systems, such as robotics. Beyond ensuring privacy-preserving operation and resilience in connectivity-limited environments, edge deployment offers significant energ... » read more

Blend Strategy To Improve Edge Resistance Capability And Thickness Of EUV-Fabricated Nanopatterns (National Tsing Hua Univ.)


A new technical paper titled "Enhanced Edge Etching Resistance and EUV Lithographic Performance of a Tin-Oxide Photoresist via a Blend Strategy" was published by researchers at National Tsing Hua University. Abstract "Enhancing the edge resistance capability of extensively studied metal carboxylate clusters as extreme ultraviolet (EUV) photoresists is a formidable and unsolved task. This wo... » read more

Overcoming The vdW Gap Bottleneck in Semiconductor Scaling (TU Wien)


A new technical paper titled "The van der Waals Gap: a Hidden Showstopper in Semiconductor Device Scaling" was published by researchers at TU Wien. Abstract "Continued miniaturization of transistors is critical for sustaining advances in computing performance, energy efficiency, and integration density. A central nanoscale challenge is controlling gate leakage through ultrathin dielectrics.... » read more

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