Microarchitecture Tailored to 3D-Stacked Near-Memory Processing LLM Decoding (U. of Edinburgh, Peking U., Cambridge et al.)


A new technical paper, "Rethinking Compute Substrates for 3D-Stacked Near-Memory LLM Decoding: Microarchitecture-Scheduling Co-Design," was published by researchers at University of Edinburgh, Peking University, University of Cambridge, University of Chinese Academy of Sciences, and the Hong Kong University of Science and Technology. Abstract "Large language model (LLM) decoding is a majo... » read more

Rethinking ESD Protection for System-On-Integrated Chiplets (UC Riverside)


A new technical paper, "In-SoIC ESD Protection for Chiplet-Based 3D Microsystems: Future Research Directions," was published by researchers at the University of California, Riverside. Abstract "Heterogeneous integration opens a pathway to three-dimensional chiplet-based microsystem chips. Electrostatic discharge reliability is a major challenge to future smart chips featuring rich functio... » read more

Alumina Nanowires Improve Thermal Management in Advanced Packaging (Georgia Tech et al.)


A new technical paper, "Epoxy Composites Reinforced with Long Al2O3 Nanowires for Enhanced Thermal Management in Advanced Semiconductor Packaging," was published by researchers at the Georgia Institute of Technology and National Cheng Kung University. Abstract "The rapid increase in heat flux in advanced 2.5D/3D semiconductor packaging places stringent demands on thermal interface materia... » read more

Mapping and Routing Fault-Tolerant Quantum Circuits Onto Chiplet Architectures (TU Munich)


A new technical paper, "Chipmunq: A Fault-Tolerant Compiler for Chiplet Quantum Architectures," was published by researchers at the Technical University of Munich. Abstract "As quantum computing advances toward fault-tolerance through quantum error correction, modular chiplet architectures have emerged to provide the massive qubit counts required while overcoming fabrication limits of mon... » read more

Leveraging Agentic AI Techniques to Improve Formal Verification (Infineon, et al.)


A new technical paper, "Agentic AI-based Coverage Closure for Formal Verification," was published by researchers at Infineon and the NIT Jalandhar. Abstract "Coverage closure is a critical requirement in Integrated Chip (IC) development process and key metric for verification sign-off. However, traditional exhaustive approaches often fail to achieve full coverage within project timelines.... » read more

Reflectometry-Based Technique for Characterising Complex Thin-Film Structures (Aalto U. et al.)


A new technical paper, "Characterisation of Complex Multilayer Nanostructures with High Aspect Ratio," was recent published by researchers at Aalto University, University of Eastern Finland, Chipmetrics OY, and VTT MIKES. Abstract "Deposition studies of deep vertical dips on semiconductor wafers can create problems at an industrial manufacturing scale, since cross-sectioning requires a lo... » read more

Emulation-based SoC Security Verification (U. of Florida)


A new technical paper, "Emulation-based System-on-Chip Security Verification: Challenges and Opportunities," was published by researchers at University of Florida. Abstract "Increasing system-on-chip (SoC) heterogeneity, deep hardware/software integration, and the proliferation of third-party intellectual property (IP) have brought security validation to the forefront of semiconductor desig... » read more

GPU Rowhammer Attacks Beyond Data Corruption (U. of Toronto)


A new technical paper, "GPUBreach: Privilege Escalation Attacks via GPU Rowhammer," was published by researchers at University of Toronto. Summary "GPUBreach shows that GPU Rowhammer attacks can move beyond data corruption to real privilege escalation. By corrupting GPU page tables, an unprivileged CUDA kernel can gain arbitrary GPU memory read/write, and then chain that capability into CPU... » read more

Silent Data Corruption: A Major Reliability Challenge in Large-Scale LLM Training (TU Berlin)


A new technical paper, "Exploring Silent Data Corruption as a Reliability Challenge in LLM Training," was published by researchers at Technische Universitat Berlin. Abstract "As Large Language Models (LLMs) scale in size and complexity, the consequences of failures during training become increasingly severe. A major challenge arises from Silent Data Corruption (SDC): hardware-induced faults... » read more

An Engineering Roadmap Toward Completely Neural Computers (Meta AI, KAUST)


A new technical paper, "Neural Computers," was published by researchers at Meta AI and KAUST. Abstract "We propose a new frontier: Neural Computers (NCs) -- an emerging machine form that unifies computation, memory, and I/O in a learned runtime state. Unlike conventional computers, which execute explicit programs, agents, which act over external execution environments, and world models, w... » read more

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