category: Top Stories

category: Auto, Security & Edge AI

Solid Verification Methodology Essential To Productivity
By Ann Mutschler - 22 Sep, 2011 - Comments: 0

Verifying SoCs from a functional perspective pushes the limits of already lean resources, driving verification teams to seek out new ways to improve productivity of verification tasks. Of course, with the verification task being a time-bound one, the challenge is daunting. It is well understood that consumer electronics is pushing the technology envelope in terms of the amount of technology ... » read more

Betting On Glass TSVs
By Ed Sperling - 22 Sep, 2011 - Comments: 0

By Ed Sperling There are two big issues when it comes to through-silicon vias. One involves cost. The second involves heat—in particular, how to get heat out of a stacked die and what the thermal coefficient of the TSV will be to make sure it expands at a rate consistent with the SoCs in a package. To address these issues, System-Level Design caught up with Rao Tummala, professor of elect... » read more

High-Speed Interfaces Dominate New Designs
By Ed Sperling - 22 Sep, 2011 - Comments: 0

By Pallab Chatterjee Displays, inputs devices and storage interfaces have now moved up into the high-speed multi-gigabit per second data rates. These were formerly Mb/s technologies, but they have moved into the Gb/s format. Adding a high-speed interface on a system is not the same as on an IC. PCBs do not have the luxury of Moore's Law to drive the technology, so bringing new high-speed parts... » read more

20nm IP Portability Appears Virtually Impossible
By Ed Sperling - 22 Sep, 2011 - Comments: 0

By Ann Steffora Mutschler Each node on the deep submicron path has brought new challenges to engineering teams, and 20nm is no different. With EUV (extreme ultraviolet) lithography challenges still being worked out, double patterning (DP) instead will be embraced in the manufacturing process most likely until 10nm. Due to the unique nature of DP, IP portability between foundries will become a ... » read more

Will Wide I/O Reduce Cache?
By Ed Sperling - 25 Aug, 2011 - Comments: 0

By Ann Steffora Mutschler In an ideal world, all new SoC technologies would make the lives of design engineers easier. While this may be true of some techniques, it is not the case with one advanced memory interface technology on the horizon, Wide I/O. There are claims that Wide I/O could reduce cache, but so far this is not widely understood. In fact, exactly how Wide I/O will be used, wha... » read more

The Age Of No-Spin Doctors
By Ed Sperling - 25 Aug, 2011 - Comments: 0

By Pallab Chatterjee Solid-state flash memory still isn’t cheap, but performance, reliability and power have transformed it from a niche market into a mainstream one. And it’s about to get even more popular. At the recent flash memory summit, the majority of the sessions focused on the further penetration of NAND flash into the consumer electronics product segment. NAND technology alrea... » read more

Wide I/O’s Impact On Memory
By Ed Sperling - 25 Aug, 2011 - Comments: 0

By Ann Steffora Mutschler Driven by the need to reduce power but increase bandwidth in smart phones and other mobile devices, system architects are grappling with new technologies to take system performance to the next level. Wide I/O, as well as some DDR technologies, are vying for center stage in tomorrow’s leading-edge mobile designs. “The big technological advancement that allows a ... » read more

Testing One, Two, Three
By Ed Sperling - 25 Aug, 2011 - Comments: 0

By Ed Sperling The rule of thumb at 90nm—still one of the mainstream process nodes—has been that test is something you do when a chip is done. You attach electrodes on either side, make sure the signal comes through clearly, and that the SoC functions properly. Try the same thing at 40nm, with multiple power islands, multiple voltage rails, lots of third-party IP and usually a slew of p... » read more

What’s A Cell Phone?
By Ed Sperling - 01 Aug, 2011 - Comments: 0

By Ed Sperling Just because a smart phone is sold by Verizon or AT&T mobile no longer means that it will be used primarily as a phone. That distinction may sound trivial, but it has deep implications for the components that are used inside of these devices, how they’re used, and who wins the designs. Shifts such as this can also lead to broad changes in who buys the tools to develop the ... » read more

RF, MEMS, Photonics Driving 3D Stacking
By Ed Sperling - 28 Jul, 2011 - Comments: 0

By Pallab Chatterjee At Semicon West, a number of the key speakers and TechXPOTs were talking about current products being assembled and shipped with 3D technology. 3D die stacking is no longer a technology of the future. In fact it has been here for many years and has been used in millions, if not billions, of consumer, commercial and high-reliability designs. The two leading technologies ... » read more

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