Tools For Heterogeneous System Development


System architects look to both heterogeneous and homogeneous computing when there are no other options available, but the current thinking is that a system-level software methodology could simplify the design, ease integration of various blocks, and potentially improve performance for less power. While the theory appears sound enough, implementing it has turned out to be harder than expected. ... » read more

Reflecting Back On 2016


Anyone can make a prediction, and sometimes the more outlandish they are the more they get noticed. But at the end of the year some people hit the mark while others may have been way off. Many people simply make projections based on the current trajectory of trends, while others look for the potential discontinuities that may lie ahead. Semiconductor Engineering examines the projections made... » read more

Foundries See Mixed Future


Amid a tumultuous business environment, the silicon foundry industry is projected to see steady growth in a number of process segments in 2017. As in past years, the foundry market is expected to grow faster than the overall IC industry in 2017. But at the same time, the IC industry—the foundry customer base—continues to witness a frenetic wave of merger and acquisition activity. Basical... » read more

Uncertainty Grows For 5nm, 3nm


As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

Etching Technology Advances


Let’s get really, really small. That directive from leading semiconductor companies and their customers is forcing the whole semiconductor supply chain to come up with new ways to design and manufacture ever-shrinking dimensions for chips. The current push is to 10nm and 7nm, but R&D into 5nm and 3nm is already underway. To put this in perspective, there are roughly two silicon atom... » read more

Inside Advanced Patterning


Prabu Raja, group vice president and general manager for the Patterning and Packaging Group at [getentity id="22817" e_name="Applied Materials"], sat down with Semiconductor Engineering to discuss the trends in patterning, selective processes and other topics. Raja is also a fellow at Applied Materials. What follows are excerpts of that conversion. SE: From your standpoint, what are the big... » read more

BEOL Issues At 10nm And 7nm (Part 1)


Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for [getentity id="22819" e_name="GlobalFoundries'"] advanced technology development integration unit; Paul Besser, senior technology director at [getentity id="22820" comment="Lam Research"]; David Fried, CTO at [getentity id="22210" e_name... » read more

Fab Tool Biz Faces Challenges In 2017


After experiencing a gradual recovery and positive growth in 2016, the semiconductor equipment industry sees a mixed picture as well as some uncertainty in 2017. In the near term, though, business is robust. Several chipmakers started to place a sizeable number of fab tool orders in the latter part of 2016, particularly in three areas—3D NAND, logic and foundry. Now, after buying the in... » read more

More Than Just Carbon Dioxide


As discussed in Part Two of this series, lifecycle analyses of greenhouse gas emissions consider both direct and indirect sources. Indirect CO2 emissions, attributed to electricity and other forms of energy purchased by the fab, are the semiconductor industry’s single largest environmental impact. Of those emissions, a large fraction are attributable to plasma-based etch and deposition steps,... » read more

Overcoming The Limits Of Scaling


Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with [getperson id="11425" comment=" Sundari Mitra"], CEO of [getentity id="22535" comment="NetSpeed Systems"]; Charlie Janac, chairman and CEO of [getentity id="22674" e_name="Arteris"]; [getperson id="11032" comment="Simon Davidmann"] CEO of [getentit... » read more

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