category: Top Stories

category: Auto, Security & Edge AI

One-on-One: Steven Woo
By Ernest Worthman - 05 Mar, 2015 - Comments: 1

Semiconductor Engineering sat down with Steven Woo, vice president and distinguished inventor at [getentity id="22671" e_name="Rambus"], to talk about the IoT and where the real problems are showing up. SE: What are the big challenges as we move toward an [getkc id="76" comment="Internet of Things"]-connected world? Woo: The challenges we see, moving forward aren’t particularly related... » read more

What Ford Is Driving
By Ed Sperling - 04 Mar, 2015 - Comments: 0

Jim Buczkowski, director of electrical and electronics systems research and advanced engineering at Ford Motor Co., sat down with Semiconductor Engineering to talk about quality, security, architectures, packaging and automotive's unique constraints. What follows are excerpts of that conversation. SE: As more electronic content is included in automobiles, what kinds of issues are you dealing... » read more

More Lithography Options?
By Mark LaPedus - 03 Mar, 2015 - Comments: 1

Lithographers face some tough decisions at 10nm and beyond. At these nodes, IC makers are still weighing the various patterning options. And to make it even more difficult, lithographers could soon have some new, and potentially disruptive, options on the table. On one front, the traditional next-generation lithography (NGL) technologies are finally making some noticeable progress. For examp... » read more

How To Deal With Electromigration
By Katherine Derbyshire - 02 Mar, 2015 - Comments: 8

The replacement of aluminum with copper interconnect wiring, first demonstrated by IBM in 1997, brought the integrated circuit industry substantial improvements in both resistance to electromigration and line conductivity. Copper is both a better and more stable conductor than aluminum. Difficult though the transition was, it helped extend device scaling for another eighteen years (and counting... » read more

Mentor Graphics Buys Tanner EDA
By Ed Sperling - 26 Feb, 2015 - Comments: 4

By Ed Sperling & Brian Bailey [getentity id="22017" e_name="Mentor Graphics"] has just purchased [getentity id="22561" e_name="Tanner EDA"] for an undisclosed sum, according to sources close to the deal. The acquisition moves Mentor squarely into the analog and mixed signal tools world, while positioning it to play a much bigger role in the Internet of Things market. Mentor isn't t... » read more

Partition Lines Growing Fuzzy
By Ed Sperling - 26 Feb, 2015 - Comments: 0

For as long as most semiconductor engineers can remember, chips with discrete functions started out on a printed circuit board, progressed into chip sets when it made sense and eventually were integrated onto the same die. The primary motivations behind this trend were performance and cost—shorter distance, fewer mask layers, less silicon. But this equation has been changing over the past ... » read more

Incremental Design Methodologies
By Brian Bailey - 26 Feb, 2015 - Comments: 0

There are times when we become stuck in the past, or choose to believe something that is no longer true or actually never was true. As we get older, we are all guilty of that. History tends to rewrite itself, especially given that this industry is aging. One of these situations occurred recently, and comments from an industry luminary didn’t align with the thoughts and memories of other peopl... » read more

IP Market Booms At Advanced Nodes
By Ann Mutschler - 26 Feb, 2015 - Comments: 0

As [getkc id="81" kc_name="SoC"] design and manufacturing costs rise, system OEMs are wringing as much of that increase as they can from ASIC vendors. The result is that engineering teams on the design and test side are being constrained by budgets at a time when complexity is rising and time-to-market pressures are increasing. At least one segment is benefiting from directly this. Budgetary... » read more

Custom Versus Platform Design
By Ed Sperling - 26 Feb, 2015 - Comments: 0

The increase in [getkc id="81" kc_name="SoC"] complexity is being mirrored by a rise in complexity within the markets that drive demand for those chips. The upshot is that a push toward greater connectivity, lower power and better performance—and all for a minimal cost—has turned the pros and cons for custom design vs. platforms and superchips into a murky decision-making process. For t... » read more

First Time Success And Cost Control
By Brian Bailey - 26 Feb, 2015 - Comments: 0

First time success has been the ultimate goal for semiconductor companies due to escalating mask costs, as well as a guiding objective for the development of EDA tools, especially in the systems and verification space. These pressures are magnified for the [getkc id="76" comment="Internet of Things"] (IoT), especially the edge devices. Have system-level tools been able to contribute to first ti... » read more

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