category: Whitepapers

category: IoT, Security & Automotive

Benefits Of Multilevel Topologies In Power-Efficient Energy Storage Systems (ESS)
By Infineon - 07 Apr, 2021 - Comments: 0

In this paper, we discuss the adaption of efficient energy storage systems (ESS) in residential solar and utility-scale applications. System requirements and possible topologies are looked into. For utility-scale, we introduce a multilevel converter topology concept. Click here to read more.   » read more

Load-Pull Analysis For Optimizing PA Performance
By Cadence - 07 Apr, 2021 - Comments: 0

In load pull calculations, power amplifiers are going to need harmonic load pull analysis and load pull contours with wideband electromagnetic tuners. Working with RFIC power amplifiers is difficult for the myriad of concurrent design elements that they affect, transmission line voltage, signal interference, and impedance to name a few. In load pull calculations, power amplifiers are going t... » read more

6 Steps To Successful Board Level Reliability Testing
By Ansys - 07 Apr, 2021 - Comments: 0

For semiconductor manufacturers entering the automotive environment, the lack of universal qualifications standards often leads to inconsistent reliability expectations. The most efficient solution is to establish a robust and thorough BLR testing plan that is uniquely designed for a specific manufacturer validated by a broad range of industry experiences. 6 Steps to Successful Board Level R... » read more

Automated Traceability Of Requirements In The Design And Verification Process Of Safety-Critical Mixed-Signal Systems
By Fraunhofer IIS/EAS - 07 Apr, 2021 - Comments: 0

System-level design and verification of safety-critical hardware requires a consistent methodology which complies with industrial safety-standards, for example ISO 26262 for automotive applications. For certification of safety-critical systems, the development process has to implement and enforce a strict traceability of requirements, linking the requirement specification, the design implementa... » read more

Understanding Write Combining On Arm
By Arm - 07 Apr, 2021 - Comments: 0

Write Combining (WC) is a specialized memory type defined by the x86-64 architecture that is used for gathering multiple stores into burst transactions over the system bus. WC is commonly used on x86-64 platforms for interaction with I/O and other peripheral devices. In this whitepaper we provide an overview of the Arm architecture memory types that provide WC-like capabilities. In addition, t... » read more

Advantages Of Picosecond Ultrasonic Technology For Advanced RF Metrology
By Onto Innovation - 06 Apr, 2021 - Comments: 0

This paper is from China Semiconductor Technology International Conference (CSTIC). Picosecond Ultrasonics (PULSE Technology) has been widely adopted as the tool-of-record for metal film thickness metrology in semiconductor fabs around the world. It provides unique advantages, such as being a rapid, non-contact, non-destructive technology, and has capabilities for simultaneous multiple layer... » read more

Finding And Fixing Design And Testbench Coding Errors On The Fly
By Synopsys - 06 Apr, 2021 - Comments: 0

Two things are certain in chip verification: as many bugs as possible must be found and fixed before fabrication, and this must happen as early as possible in the development process. The much-desired “shift left” in verification requires that advanced analysis and debug technologies be available to engineers from the earliest stages of the project. It is preferable that many classes of err... » read more

Systematic Methodology To Solve Reset Challenges In Automotive SoCs
By Siemens EDA - 31 Mar, 2021 - Comments: 0

Modern automotive SoCs typically contain multiple asynchronous reset signals to ensure systematic functional recovery from unexpected situations and faults. This complex reset architecture leads to a new set of problems such as possible reset domain crossing (RDC) issues. The conventional clock domain and CDC verification methodologies cannot identify such critical bugs. In this paper, we prese... » read more

Xilinx AI Engines And Their Applications
By Xilinx - 31 Mar, 2021 - Comments: 0

This white paper explores the architecture, applications, and benefits of using Xilinx's new AI Engine for compute intensive applications like 5G cellular and machine learning DNN/CNN. 5G requires between five to 10 times higher compute density when compared with prior generations; AI Engines have been optimized for DSP, meeting both the throughput and compute requirements to deliver the hig... » read more

mmWave Chip, Package, And Board Beamforming Solutions
By Cadence - 31 Mar, 2021 - Comments: 0

RF front-end architectures grow more complex with each generation of communication systems. To accommodate these architectures, more densification and miniaturization is taking place with electronic systems implemented through innovations in system-in-package (SiP) design. 5G data rates exceeding 1GB/s will be supported by the available bandwidth in the millimeter-wave (mmWave) spectrum and ... » read more

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