Chip Industry Week In Review

Leading-edge foundry plans; DoD IC center; 300mm funding; Intel’s apprenticeship program; metrology and test acquisitions; Keysight’s chiplet PHY simulation; thermal management in 3D-ICs; foundry growth.

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The University of Texas at Austin’s Texas Institute for Electronics (TIE) was awarded $840 million to establish a Department of Defense microelectronics manufacturing center. This center will focus on developing advanced semiconductor microsystems to enhance U.S. defense systems. The project is part of DARPA‘s NGMM Program.

The U.S. Dept. of Commerce announced preliminary terms with GlobalWafers to significantly boost U.S. silicon wafer production. The terms include a $400 million CHIPS Act investment to establish the first domestic 300mm silicon wafer facility for advanced chips in Texas and a new 300mm silicon-on-insulator wafer facility in Missouri.

Rocket Lab reached an agreement under the CHIPS Act for up to $23.9 million in funding to increase compound semiconductor production in New Mexico by 50% within the next three years for spacecraft and satellites. This expansion supports critical space programs and national security needs.

The three leading-edge foundries — Intel, Samsung, and TSMC — have started filling in some key pieces in their roadmaps, adding aggressive delivery dates for future generations of chip technology and setting the stage for significant improvements in performance with faster delivery time for custom designs.

Quick links to more news:

Global
In-Depth
Markets and Money
Education and Training
Security
Product News
Research
Events and Further Reading


Global

Huawei has almost finished building a 10 billion yuan ($1.4 billion) chip R&D center in Shanghai, China, to make chips for a variety of IoT devices and wireless networks, BNN Bloomberg reported.

The Chips Joint Undertaking announced a collaborative effort between the EU and South Korea to advance semiconductor R&D. The goal is to co-develop technology, increase supply chain resilience, and secure a “leading position” in the chip industry.

The U.S. Department of State and Inter-American Development Bank announced the Western Hemisphere Semiconductor Initiative, supported through the CHIPS Act, to enhance semiconductor assembly, testing, and packaging (ATP) capabilities in partner countries, starting with Mexico, Panama, and Costa Rica. Also, the U.S. Department of State and Mexico’s Secretariat of Economy will host the “Americas Partnership Semiconductor Symposium: Expanding the Supplier Ecosystem” on September 5 – 6, in Mexico City.

The U.S. Department of Commerce (DoC) and Natcast announced the processes for selecting the first three R&D facilities funded through the CHIPS Act, including an NSTC Prototyping and National Advanced Packaging Manufacturing Program (NAPMP) Advanced Packaging Piloting Facility, an NSTC Administrative and Design Facility, and an NSTC extreme ultraviolet (EUV) Center.

Infineon and Amkor signed an MoU to stimulate decarbonization and sustainability strategies across their supply chains. The companies operate a packaging and test center at Amkor’s manufacturing site in Porto, Portugal.

U.S. and Israel-based Ramon.Space, which makes a space-resilient ML/AI DSP among other products, opened its first European office in Surrey Research Park, UK.


In-Depth

Semiconductor Engineering published its Low Power-High Performance newsletter this week, featuring these top stories:


Markets and Money

The semiconductor foundry industry is projected to grow at a 5.4% CAGR until 2029, according to a new report from Yole Group. Growth will be driven by demand in server, automotive, and industrial sectors, but complexities from make-or-buy decisions and international dependencies could affect suppliers.

Electronic system design (ESD) revenue increased 14.4% to $4.522 billion in Q1, but sales of EDA tools in China dropped precipitously. Nonetheless, other countries in Asia made up for China’s deficit.

Merck KGaA, Darmstadt, Germany, intends to acquire Unity-SC, a provider of metrology and inspection tools for applications related to artificial intelligence (AI), high-performance computing (HPC), and high-bandwidth memory (HBM). The deal is valued at €155 million ($172.3 million) plus milestone payments, pending regulatory approval, and is expected to close by the end of 2024.

Aehr Test Systems announced its acquisition of Incal Technology for $21 million to expand its market in high-power test solutions for AI accelerators and GPUs.

New funding rounds continue to pour into the chip (and related) industry:

  • Halo Industries secured $80 million in a Series B funding round to help scale the commercialization of Halo’s laser manufacturing technology platform, which improves the efficiency and quality of silicon carbide (SiC) wafer production.
  • DreamBig closed a $75 million Series B funding round to expand its AI inference and training solutions and bolster the development and commercialization of chiplet products.
  • Nearfield Instruments secured €135 million ($147.2 million) in a Series-C funding to boost production capacity and expand their product portfolio, focusing on advanced metrology solutions like the QUADRA 3D system.
  • QC Design received over $4 million in funding after being selected for the European Innovation Council’s Accelerator program. The money will go towards developing the company’s fault tolerance design automation tools for quantum computing.
  • SK Telecom agreed to invest $200 million in SMART Global Holdings, which specializes in specializing platforms for high-performance computing, AI, and IoT. The partnership is aimed at enabling cooperation developing AI infrastructure including both data centers and on the edge.
  • Cloverleaf Infrastructure, which develops data centers powered by low-carbon electricity, secured $300 million from private equity firms NGP and Sandbrook Capital. Cloverleaf said the investment will help fuel development of sustainable data center technology.

Security

AI security is getting more attention:

  • The Coalition for Secure AI (CoSAI) initiative launched this week, bringing together many stakeholders and leaders to address AI security. Intel, NVIDIA, and OpenAI are among the members.
  • The U.S. Department of Energy (DoE) announced its Frontiers in Artificial Intelligence for Science, Security, and Technology (FASST) initiative to help harness AI for the public good.
  • The Common Weakness Enumeration (CWE) published CWE Version 4.15 with a new weakness entry related to AI, and examples added to multiple CWEs related to AI/ML and generative AI prompts, plus usability improvements.

Google is in talks to buy cloud security company Wiz, according to Reuters. Wiz was founded by former Israeli army intelligence members who sold another cloud security firm, Adallom, to Microsoft for $320 million in 2015.

In security research:

  • TU Dresden and Ruhr University Bochum researchers used flip-flops along logic gates to prevent synthesis tools’ structural leakages.
  • MIT researchers presented an experimental demonstration of three-terminal superparamagnetic tunnel junctions (sMTJs) as reliable sources of true randomness under a field-free regime.
  • Researchers from the University of Trento and Huawei Research Munich proposed a secure shadow stack design and implementation for low-end embedded systems, relying on zero hardware security features.

The Cybersecurity and Infrastructure Security Agency (CISA) issued a number of alerts/advisories.


Education and Training

Intel launched its first U.S. registered apprenticeship program for fab technicians in Arizona in collaboration with the Arizona Commerce Authority (ACA), the Phoenix Business and Workforce Development Board, the SEMI Foundation, Maricopa Community Colleges District, and Fresh Start Women’s Foundation. The one-year program will combine classroom instruction with on-the-job training. Participants will be hired as Intel employees as they learn core competencies.

The National Science Foundation (NSF) selected the Texas Advanced Computing Center (TACC) at the University of Texas at Austin to be the Leadership-Class Computing Facility (LCCF) with an initial investment of $457 million, aiming to meet increased demand for computational solutions.

Insight Global and the U.S. National Institute for Industry and Career Advancement (NIICA) launched a program to help place returning service members and veterans in semiconductor and advanced manufacturing industries.

The University of Illinois Urbana-Champaign (UIUC) is now offering a minor in Semiconductor Engineering and will host a Quantum Proving Ground (QPG) with federal funding from DARPA and other agencies, along with state funding of up to $140 million.

The U.S. Defense Advanced Research Projects Agency (DARPA) launched the Quantum Benchmarking Initiative (QBI), and seeks collaborators.


Product News

Keysight rolled out a new modeling and simulation system that can estimate chiplet die-to-die PHY performance and voltage transfer function performance. The PCIe algorithmic modeling interface supports multi-link, multi-lane, and multi-level PAM4 and NRZ.

Quadric unveiled its Chimera QC Series of GPNPUs, combining the ML performance of a neural processing accelerator with full C++ programmability. The QC series includes three configurable single-processor options that can put out up to 108 TOPs.

Ansys partnered with Supermicro and NVIDIA to work on turnkey hardware that will run Ansys’ multi-physics simulation solutions. The company said the collaboration will also quicken time to market for designs ranging from automotive to aerodynamics to 5G/6G to pharmaceutical development.

Renesas and AMD developed a space-ready power management reference design for the AMD Versal AI Edge XQRVE2302 Adaptive SoC, targeting cost-effective AI Edge with both rad-hard and rad-tolerant plastic solutions to support power rails for next-generation space avionics systems. Renesas also released Reality AI Explorer Tier, a free version of its Reality AI Tools software, for developing AI and TinyML solutions in industrial, automotive, and commercial applications.

Expedera achieved ISO 26262 ASIL-B automotive safety certification for its Origin NPU IP solution.

Synopsys announced its ARC HS4xFS Processor IP achieved ISO/SAE 21434 automotive cybersecurity certification by SGS-TV Saar. The processors are also certified to the ISO 26262 standard, making the technology both cybersecurity and safety certified.

Infineon, MediaTek, and its design house partners developed an automotive cockpit solution based on Infineon’s TRAVEO CYT4DN MCU family, and an entry-level MediaTek Dimensity Auto SoC solution that reduces bill of materials costs for both hardware and software.

Keysight unveiled two new mainframe and module models for its MP4300A Series Modular Solar Array Simulator, which allows engineers to simulate power management systems for solar-powered spacecraft. The MP4300A platform features 8.4 kW of power in 2U of rack space and up to six channel outputs with flexible power and performance options.


Research

imec published the first of a two-part series dedicated to chiplets. Part 1 addresses developments in interconnect technologies and Part 2 will cover testing strategies and standardization efforts. imec also discussed details of its new High NA EUV Lithography Lab in the Netherlands (jointly run with ASML).

Researchers at the University of Illinois Urbana-Champaign (UIUC) announced improvements to SCRIBE, a lithographic approach for making 3D optical and photonic structures inside a wafer, and say it is now ready for prime time.

Researchers from MIT and elsewhere developed an ML framework that can predict phonon dispersion relations up to 1,000 times faster than other AI-based techniques, to help design energy generation systems that produce more power, more efficiently, and develop more efficient microelectronics with better heat management.

Researchers at Oak Ridge National Laboratory (ORNL), the University of Melbourne, AMD, and QDX used the Frontier supercomputer to calculate the dynamics of more than 2 million electrons. It calculated the number of atoms in a molecular dynamics simulation 1,000 times greater in size and speed than any previous simulation of its kind. And it is the first time-resolved quantum chemistry simulation to exceed an exaflop using double-precision arithmetic.

TU Wien patented a new method of dampening vibrations, with implications for precision devices such as high-performance astronomical telescopes, the precision production of semiconductor chips, and large high-quality optics, adaptive actuators, or laboratory-based precision measurement technology.


Events and Further Reading

Find upcoming chip industry events here, including:

Event Date Location
Atomic Layer Deposition (ALD 2024) Aug 4 – 7 Helsinki
Flash Memory Summit Aug 6 – 8 Santa Clara, CA
USENIX Security Symposium Aug 14 – 16 Philadelphia, PA
SPIE Optics + Photonics 2024 Aug 18 – 22 San Diego, CA
Cadence Cloud Tech Day Aug 20 San Jose, CA
Hot Chips 2024 Aug 25- 27 Stanford University/ Hybrid
Optica Online Industry Meeting: PIC Manufacturing, Packaging and Testing (imec) Aug 27 Online
SEMICON Taiwan Sep 4 -6 Taipei
DVCON Taiwan Sep 10 – 11 Hsinchu
AI HW and Edge AI Summit Sep 9 – 12 San Jose, CA
GSA Executive Forum Sep 26 Menlo Park, CA
SPIE Photomask Technology + EUVL Sep 29 – Oct 3 Monterey, CA
Strategic Materials Conference: SMC 2024 Sep 30 – Oct 2 San Jose, CA
Find All Upcoming Events Here

Upcoming webinars are here, including topics such as thermal integrity, securing silicon, and design verification.

Semiconductor Engineering’s latest newsletters:

Automotive, Security and Pervasive Computing
Systems and Design
Low Power-High Performance
Test, Measurement and Analytics
Manufacturing, Packaging and Materials



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