EDA export controls; Synopsys-Ansys divest requirements; SIA Factbook; McKinsey effects of tariffs; ASE’s fan-out bridge; earnings; TSMC’s design center; China’s legacy chips play; AMD’s optical acquisition.
The U.S. Commerce Department is tightening controls on EDA software sold to China by imposing additional license requirements. EDA companies are assessing the impact. Details on how broad the restrictions will be are still pending.
The U.S. Federal Trade Commission (FTC) will require Synopsys and Ansys to divest key software assets — including optical, photonic, and RTL power analysis tools — to Keysight Technologies to resolve antitrust concerns over their proposed $35 billion merger.
The Semiconductor Industry Association published a 2025 Factbook, providing analysis and key metrics on the U.S. chip industry, as well as comparisons to other countries.
Fig.1: Global market share of semiconductor shipments in 2024. Source: SIA’s 2025 Factbook
McKinsey’s recent report, “The effects of tariffs on the semiconductor industry,” offers mitigation strategies to semiconductor leaders, highlighting a general quandary — whether to absorb the tariff cost increases or pass them on to customers, in the midst of shifting policies. [Tariffs are currently under review by U.S. courts.]
Meanwhile, China and Europe pledged to deepen cooperation in the semiconductor sector. At a recent meeting with China’s Ministry of Commerce, officials and representatives from more than 40 semiconductor companies highlighted the importance of open trade, mutual understanding, and joint efforts to support global economic recovery amid rising geopolitical uncertainties.
ASE introduced a fan-out chip-on-substrate (FoCoS) bridge with through-silicon vias, which the company says reduces power loss by 3X. The packaging technology is aimed at next-gen AI and HPC applications.
Belgium-based imec highlighted its 300mm RF silicon interposer platform, which enables seamless integration of RF-to-sub-THz CMOS and III/V chiplets on a single carrier, achieving a record-low insertion loss of just 0.73 dB/mm at frequencies up to 325 GHz. The R&D hub also provided details on its curvilinear manufacturing solution for advanced logic chips.
Earnings this week: Marvell Technology, Nordson, NVIDIA, Synopsys, Soitec, Semtech.
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Infineon launched its new family of radiation-hardened transistors, including one of the first DLA JANS-certified GaN devices.
Huawei announced a Supernode computing architecture based on its Ascend AI processors, aimed at alleviating bottlenecks in data centers and to get around U.S. export restrictions of NVIDIA chips, reports the South China Morning Post.
Marvell unveiled a novel multi-die packaging platform designed to enhance custom AI accelerators by enabling 2.8 times larger multi-chip designs compared to traditional single-die implementations.
xMEMS Labs expanded its µCooling fan-on-a-chip platform to solid-state drives, enabling in-drive active cooling for enterprise E3.S form factor SSDs used in AI data centers and NVMe M.2 SSDs used in laptop PCs.
AAEON introduced Intel Core 3 processing to its UP Squared board lines, one aimed at industrial applications and another built for low power inferencing and machine vision applications with 16GB of soldered LPDDR5.
Aeluma and Thorlabs announced a breakthrough in silicon photonics manufacturing with a large-diameter wafer platform that integrates aluminum gallium arsenide onto standard 200mm CMOS wafers, paving the way for scalable quantum photonic circuits.
Researchers at Purdue developed a way to stack chips using microscopic TSVs as vertical connectors.
Rice University materials scientists and partners created a genuine 2D hybrid by chemically integrating graphene and silica glass into a single, stable compound called glaphene, with potential for next-gen electronics, photonics, and quantum devices.
imec reported on next-gen AI and next-gen challenges, saying some models need CPUs, some GPUs, while others currently lack the right processors.
Clemson University researchers created a new polymer, pTPADTP, that could make AI more energy-efficient and cost-effective by transforming how computers process and store information.
Researchers at Texas A&M are working to source rare earth elements from discarded electronics, in partnership with Oak Ridge National Laboratory and industry partners, using a new solid-phase extraction technology.
Quantum research:
Find more chip industry research here.
BTQ Technologies and ICTK signed an MoU to advance quantum-secure hardware solutions. BTQ will combine cryptographic expertise with ICTK’s secure chip technologies.
CSIS released guidance related to criteria for cyber situational awareness, which encompasses AI tools, data collection, intelligence infrastructure and more.
Recent security research:
CISA issued a number of alerts/advisories.
MIT launched the Initiative for New Manufacturing (INM), a comprehensive effort to revitalize U.S. manufacturing by integrating cutting-edge technologies, boosting productivity, and creating high-quality jobs. Backed by founding industry members like Siemens and GE Vernova, INM will focus on AI-driven research, education, and partnerships to transform manufacturing across sectors including semiconductors, bio-manufacturing, and energy.
Ohio University Lancaster created a specialized Semiconductor Technician Certificate, which will begin training students this fall to help meet the demand of the state’s growing manufacturing industry.
Siemens’ micro-credential program was recognized by ABET, an assurance agency responsible for the accreditation of STEM academic programs. This marks the first industry credential to receive the recognition.
Find upcoming chip industry events here, including:
Date | Location | |
---|---|---|
EVENTS | ||
ECTC 2025: Electronic Components and Technology Conference Conference | May 27 – 30 | Dallas, TX |
Hardwear.io Security Trainings and Conference USA 2025 | May 27 – 31 | Santa Clara, CA |
Realize LIVE Americas 2025 | Jun 2 – 5 | Detroit |
SNUG Europe | Jun 2 – 3 | Munich |
SWTest 2025 | Jun 2 – 4 | Carlsbad, CA |
2025 IEEE Symposium on VLSI Technology and Circuits | Jun 8 – 12 | Kyoto, Japan + virtual after conference is over |
CadenceCONNECT: Tech Days Europe 2025 | Jun 10 – Jul 3 | Multiple |
WORKSHOP: An integrated simulation workflow from Chip to Data Center | Jun 11 | Fremont, CA |
Agentic AI For Next-Gen Semiconductor Manufacturing | Jun 11 – 12 | Milpitas, CA |
PCI-SIG Developers Conference 2025 | Jun 11 – 12 | Santa Clara, CA |
SNUG Taiwan | Jun 18 | Hsinchu |
DAC: The Chips to Systems Conference 2025 | Jun 22 – 25 | San Francisco |
ALD/ALE 2025 | Jun 22 – 25 | Jeju Island, South Korea |
Strategic Materials Conference—SMC | Jun 23 – 25 | San Jose |
3D & Systems Summit | Jun 25 – 27 | Dresden, Germany |
Realize LIVE Europe (Siemens) | Jun 30 – Jul 2 | Amsterdam |
Find all events here. | ||
Upcoming webinars are here, including these topics: smart manufacturing enabled by simulation, transforming RF PCB design, modern EDA solutions for scalable heterogeneous systems.
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