tag: 2.5D

3D Stacking: A Reality Check
By Ed Sperling - 28 Jul, 2011 - Comments: 0

By Ed Sperling The first 2.5D and 3D chips are expected to arrive next year, with the mainstream chip market expected to follow in 2013. While this trend already has seen its share of hype, stacked die—whether through a series of TSVs in true 3D or through an interposer layer in 2.5D—is as real as Moore’s Law. In fact, it’s a direct result of Moore’s Law. But unlike the progres... » read more

Not So Fast
By Ed Sperling - 01 Jul, 2011 - Comments: 0

Semiconductor engineering has always been about taking two steps forward and one step back. Or, if you’re more cynical, you don’t really move at all. You just get better at what you do. The cynical approach is that nothing is really new because it’s all been done before. In effect, 2.5D packages are multi-chip modules with a better business case and more advanced versions of what exist... » read more

Keeping Up With Complexity
By Ed Sperling - 31 Mar, 2011 - Comments: 0

By Ed Sperling There are two schools of thought in designing complex SoCs. One says that increasing complexity requires a higher level of abstraction. The other says providing enough detail to get the design right is the only effective way to do it. There are staunch proponents of both approaches, but what has been missing are bridges to tie the higher level of abstraction to the more labo... » read more

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