tag: ARM

All Things To All Customers
By Ed Sperling - 17 Jan, 2013 - Comments: 0

By Ann Steffora Mutschler Low-Power High-Performance Engineering recently spoke with Suresh Menon, VP of systems development at Lattice Semiconductor, about the challenges of directing the development of power-sensitive FPGAs from architectural decisions to identifying the target applications. What follows are excerpts of that discussion. LPHP: When you look at the products that Lattic... » read more

What Happened To Statistical Static Timing Analysis?
By Ann Mutschler - 19 Dec, 2012 - Comments: 0

About five years ago if you listened to the marketing messages in the EDA industry, you would have thought it would be impossible to produce chips without statistical static timing analysis (SSTA). Fast forward to now and the industry seems to have put this approach on the back burner. So what happened? “The idea was that if you modeled your design instead of using a corner-based approa... » read more

Too Many Rules
By Ed Sperling - 13 Dec, 2012 - Comments: 0

By Ed Sperling The number of restrictive design rules that have to be dealt with by routers at 28nm and beyond has increased by several orders of magnitude compared with several generations ago, creating havoc in the automated tools world and slowing down the entire design process. At a time when market windows are shrinking, complexity is making it harder to meet even the old schedules. Th... » read more

Don’t miss Fully-Depleted Tech Symposium during IEDM (SF)
By Various Writers - 04 Dec, 2012 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ If you want to cut through the noise surrounding the choices for 28nm and beyond, an excellent place to start is the SOI Consortium’s Fully Depleted Technology Symposium. As a member of the design and manufacturing communities, this is your chance to see and hear what industry leaders are actually doing. Planar? F... » read more

Prototyping Now A ‘Must Have’
By Ed Sperling - 29 Nov, 2012 - Comments: 0

By Ann Steffora Mutschler No longer a ‘nice to have,’ FPGA-based prototyping is now indispensible for SoC and ASIC development. Semiconductor companies are investing in the infrastructure, the EDA tool chain, the human resources and everything needed to set up an entire department to focus on prototyping, emulation and validation. “We are seeing these customers invest in significant a... » read more

Traveling Light
By Nithya Ruff - 29 Nov, 2012 - Comments: 0

By Nithya Ruff I recently attended the Embedded Linux Conference in Barcelona representing Synopsys. I must admit, it is nice to have conferences in beautiful places so you can kill two birds with one stone. When not networking, speaking or sitting in sessions, I enjoyed seeing the beauty of Antoni Gaudi’s architecture, some great vegetarian restaurants like Juicy Jones and, of course, I enj... » read more

Facing Up To RC Delay
By Ed Sperling - 15 Nov, 2012 - Comments: 0

y Ed Sperling Resistance and capacitance delays have always been someone else’s problem to solve at some fuzzy process node in the future, and for the most part manufacturers and equipment makers have done a wizard-like job of making this problem go away. They can’t make it disappear anymore, though, and beginning at 14nm and beyond RC delay is becoming more than just an annoyance. The ... » read more

The Growing Integration Challenge
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ed Sperling As the number of processors and the amount of memory and IP on a chip continues to skyrocket, so does the challenge for integrating all of this stuff on a single die—or even multiple dies in the same package. There are a number of reasons why it’s getting more difficult to make all of these IP blocks work together. First of all, nothing ever stands still in design. As a r... » read more

New Incentives For Lowering Power
By Ed Sperling - 08 Nov, 2012 - Comments: 0

By Ed Sperling Despite all the focus by design teams on lowering power over the past few years, in many applications power is still the last consideration for many companies in the power-performance-area equation. That’s beginning to change, however, even for applications that in the past have not been particularly power-sensitive. There are several reasons for this shift. No. 1 on the li... » read more

ARM’s big.LITTLE Concept
By Barry Pangrle - 08 Nov, 2012 - Comments: 0

By Barry Pangrle ARM EVP Simon Segars gave the opening keynote address at last week’s ARM TechCon in Santa Clara, California. The big announcement was the new ARM Cortex-A53 and Cortex-A57 processors that will operate in ARM’s “big.LITTLE” configuration. I wrote a bit about big.LITTLE in my blog last year on Innovation at the Core. ARM’s big.LITTLE concept is based on using a smal... » read more

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