Integrating Error Propagation Theory Into the FMEDA Framework (Robert Bosch GmbH)


A new technical paper, "Quantifying Uncertainty in FMEDA Safety Metrics: An Error Propagation Approach for Enhanced ASIC Verification," was published by Robert Bosch GmbH. Abstract "Accurate and reliable safety metrics are paramount for functional safety verification of ASICs in automotive systems. Traditional FMEDA (Failure Modes, Effects, and Diagnostic Analysis) metrics, such as SPFM (... » read more

Study Of HW Acceleration for Neural Networks (Arizona State Univ.)


A new technical paper titled "Hardware Acceleration for Neural Networks: A Comprehensive Survey" was published by researchers at Arizona State University. Abstract "Neural networks have become a dominant computational workload across cloud and edge platforms, but their rapid growth in model size and deployment diversity has exposed hardware bottlenecks that are increasingly dominated by mem... » read more

Complex Mix Of Processors At The Edge


With AI changing so fast, it’s a juggle for companies to ensure they can deliver the best performance now while also future-proofing for unknown AI models or a completely different approach to training and inference that may emerge. There are a slew of options for high-end and budget phones, hyperscalers, and low-cost, low-power edge devices, and while GPUs keep making headlines, many designe... » read more

GPU Or ASIC For LLM Scale-Up?


The CEOs of OpenAI, Anthropic, and xAI share a strikingly similar vision — AI's progress is exponential, it will change humanity, and its impact will be greater than most people expect. This is more than just speculation. The market for AI, and its value, are real today: A human developer with GitHub CoPilot codes 55% faster with AI. GPT-4 scores 88th percentile on the LSAT vs. 50t... » read more

Machine Learning-Based IR Drop Prediction Approach


A new technical paper titled "Estimating Voltage Drop: Models, Features and Data Representation Towards a Neural Surrogate" was published by researchers at KTH Royal Institute of Technology and Ericsson Research. ABSTRACT "Accurate estimation of voltage drop (IR drop) in modern Application-Specific Integrated Circuits (ASICs) is highly time and resource demanding, due to the growing complex... » read more

AI Accelerators for Homomorphic Encryption Workloads


A new technical paper titled "Leveraging ASIC AI Chips for Homomorphic Encryption" was published by researchers at Georgia Tech, MIT, Google and Cornell University. Abstract: "Cloud-based services are making the outsourcing of sensitive client data increasingly common. Although homomorphic encryption (HE) offers strong privacy guarantee, it requires substantially more resources than compu... » read more

Post-Quantum Computing Threatens Fundamental Transport Protocols


The Transport Level Security (TLS) protocol is one of the few rock-steady spots in the rapidly changing computing industry, but that's about to change as quantum computers threaten traditional encryption schemes. Because TLS is fundamental to network communications, including allowing Internet of Things (IoT) devices to function properly, researchers already are exploring both hardware and s... » read more

Applying Machine Learning to EDA, FPGA Design Automation Tools


A technical paper titled “Application of Machine Learning in FPGA EDA Tool Development” was published by researchers at the University of Texas Dallas. Abstract: "With the recent advances in hardware technologies like advanced CPUs and GPUs and the large availability of open-source libraries, machine learning has penetrated various domains, including Electronics Design Automation (EDA). E... » read more

Programmable HW Accelerators For BGV Fully Homomorphic Encryption In The Cloud


A technical paper titled “BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption” was published by researchers at COSIC KU Leuven, Galois Inc., and Niobium Microsystems. Abstract: "Fully Homomorphic Encryption (FHE) allows for secure computation on encrypted data. Unfortunately, huge memory size, computational cost and bandwidth requirements limit its practic... » read more

A Chiplet-Based Supercomputer For Generative LLMs That Optimizes Total Cost of Ownership


A technical paper titled "Chiplet Cloud: Building AI Supercomputers for Serving Large Generative Language Models" was published by researchers at University of Washington and University of Sydney. Abstract: "Large language models (LLMs) such as ChatGPT have demonstrated unprecedented capabilities in multiple AI tasks. However, hardware inefficiencies have become a significant factor limiting ... » read more

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