Chip Industry Week In Review


Big Deals and Fundings Rapidus secured US$1.7B in a new funding round from the Japanese government and the private sector to ramp 2nm production by next year. Open AI announced a $110B in new funding, with $30B from Nvidia, $30B from Softbank and $50B from Amazon. In a $100B multi-year deal, Meta will power its AI infrastructure with up to 6GW of AMD's GPUs. SambaNova and Intel ar... » read more

AI Starting To Simplify Design Of Programmable Logic


Key Takeaways AI/ML and agentic tools are getting better at helping design and compile FPGAs, but downstream programming is slower to benefit. FPGAs historically have been designed using Verilog or VHDL, but higher-level languages could push more intelligence into compilers. ML tools can also help with mixed-signal co-design by automatically tuning DSP algorithms based on analog simu... » read more

Data Center Digital Twins: How Simulation Improves Design And Performance


Data center digital twins are transforming data center design from assumption-based planning to physics-backed simulation—well before the first rack is deployed. By combining physics simulations with real operational data, a data center digital twin enables teams to predict performance, reduce risk, and optimize capacity with measurable confidence. As power densities rise from AI and hype... » read more

40 PCB Design Tips Every Designer Should Know: eBook


This eBook details 40 essential PCB design tips, organized by 5 sections: Project Planning, Requirements, and Documentation Placement, Floorplanning, and Mechanical Integration Power, Grounding and Thermal Signal Integrity and High-Speed Routing Manufacturability, Test and Reliability Read more here.   » read more

Blog Review: Feb. 25


Cadence's Mick Posner introduces the Foundational Chiplet System Architecture, a specification that aims to deliver a vendor and CPU-neutral architecture, common system partition guidelines, and a shared vocabulary and set of standards for system-level and interface definitions between chiplets. Synopsys' Scott Knowlton explains why LPDDR6 represents a big step forward in memory management c... » read more

New Performance Requirements For Audio


Demand for higher performance in audio is rising as human-machine interactions increase on the edge. That means more processing elements, and more challenges in keeping data consistent across those processors. Prakash Madhvapathy, director of product marketing and product management at Cadence, talks about the advantages of coherent designs, how that impacts security, and how DSPs are evolving ... » read more

Chip Industry Week in Review


The IEEE ISSCC conference was held this week in San Francisco. Among the highlights: IBM detailed an AI accelerator based on its new inferencing dataflow architecture. CEA-Leti presented a chip-scale, ultra-fast, battery-operated EPR spectrometer. QuTech introduced a cryo-CMOS SoC with NV centers in diamond. UTokyo showed its low-jitter PLL architecture for beyond 5G/6G. Imec d... » read more

Laser Arrays May Simplify Co-Packaged Optics


Key Takeaways Moving photonic ICs into the same package as silicon helps improve performance, but lasers remain outside. A new monolithic laser array allows hundreds of colors, each individually software-tunable New options are being turned into products, which could help commercialize CPO. The move to co-packaged optics (CPO) holds the promise of putting photonic ICs (PICs)... » read more

Blog Review: Feb. 18


Synopsys' Raja Tabet anticipates deployment of an agentic AI workforce within the next 12 to 24 months that can take on different engineering personas, such as a digital implementation agent, a verification agent, or an analog agent, to run experiments in parallel, generate and triage tests, and propose fixes. Cadence's Reela Samuel dives into power usage effectiveness in data centers and wh... » read more

Can A Computer Science Student Be Taught To Design Hardware?


Key Takeaways New approaches are being devised and tested to address the talent shortage. Leveraging AI in design tools will help engineers become more efficient, and potentially could reduce the time it takes to train engineering students. EDA companies are looking at whether it's possible to train computer science and software engineers to become hardware engineers. A vari... » read more

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