Partitioning In 3D


The best way to improve transistor density isn't necessarily to cram more of them onto a single die. Moore’s Law in its original form stated that device density doubles about every two years while cost remains constant. It relied on the observation that the cost of a processed silicon wafer remained constant regardless of the number of devices printed on it, which in turn depended on litho... » read more

Week In Review: Manufacturing, Test


Trade More trade news: "The Trump administration is hiking duties on $200 billion worth of Chinese products to 25% from 10%," according to CNBC. The following is attributed to Gary Shapiro, president and CEO of the Consumer Technology Association (CTA), in response to President Trump’s plan to increase tariffs on $200 billion worth of Chinese imports to 25%: “The president is seeking a bet... » read more

Renaissance In The Photomask Market?


The semiconductor industry has been on a roll for the past few years – and the rising tide has lifted segments spanning the supply chain. The photomask market, in particular, has seen exceptionally strong growth of 13 percent and 8 percent in 2017 and 2018, respectively. The upsurge is striking given that, in the early to mid-2000s, the photomask market averaged less than 4 percent annual gro... » read more

EUV Mask Gaps And Issues


Semiconductor Engineering sat down to discuss extreme ultraviolet (EUV) lithography and photomask technologies with Emily Gallagher, principal member of the technical staff at Imec; Harry Levinson, principal at HJL Lithography; Chris Spence, vice president of advanced technology development at ASML; Banqiu Wu, senior director of process development at Applied Materials; and Aki Fujimura, chief ... » read more

Week In Review: Manufacturing, Test


Chipmakers Here comes the battle between 5nm and 6nm processes at two foundry vendors—Samsung and TSMC. Meanwhile, Intel is behind and scrambling to get 10nm out the door. (Intel's 10nm is equivalent to 7nm from the foundries.) Last week, TSMC announced delivery of a complete version of its 5nm design infrastructure. TSMC’s 5nm technology is based on a finFET. This week, Samsung anno... » read more

Lithography Options For Next-Gen Devices


Chipmakers are ramping up extreme ultraviolet (EUV) lithography for advanced logic at 7nm and/or 5nm, but EUV isn’t the only lithographic option on the table. For some time, the industry has been working on an assortment of other next-generation lithography technologies, including a new version of EUV. Each technology is different and aimed at different applications. Some are here today, w... » read more

Finding The Source Of EUV Stochastic Effects


The next phase of EUV development has begun—making EUV more predictable and potentially more mainstream—and it's looking to be every bit as difficult and ambitious as other developments in advanced lithography. In the early days of EUV development, supporters of the technology argued that it was “still based on photons,” as opposed to alternatives like electron beam lithography. Whil... » read more

Fast Local Registration Measurements For Efficient E-beam Writer Qualification And Correction


By Klaus-Dieter Roeth, Hendrik Steigerwald, Runyuan Han, Oliver Ache, Frank Laske (KLA-Tencor MIE GmbH, Germany) Abstract Mask data are presented which demonstrate local registration errors that can be correlated to the writing swathes of state-of-the-art e-beam writers and multi-pass strategies, potentially leading to systematic device registration errors versus design of close to 2nm. Fur... » read more

Improving SAQP Patterning Yield Using Virtual Fabrication And Advanced Process Control


Advanced logic scaling has created some difficult technical challenges, including a requirement for highly dense patterning. Imec recently confronted this challenge, by working toward the use of Metal 2 (M2) line patterning with a 16 nm half-pitch for their 7nm node (equivalent to a 5nm foundry node). Self-Aligned Quadruple Patterning (SAQP) was investigated as an alternative path to Extreme Ul... » read more

Single Vs. Multi-Patterning EUV


Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

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