Process advancements: Beyond-EUV resists; annealing SiC; etching hafnium oxide.
Researchers from Johns Hopkins University, East China University of Science and Technology, École Polytechnique Fédérale de Lausanne (EPFL), Soochow University, Brookhaven National Laboratory, and Lawrence Berkeley National Laboratory propose a combination of new resist materials and a higher-powered EUV process that could enable smaller chip feature sizes.
The “beyond extreme ultraviolet radiation” (B-EUV) process uses stronger radiation than traditional EUV, but doesn’t interact well with current resist materials. The researchers are working on new resists using imidazole-based metal-organic materials that are deposited using chemical liquid deposition (CLD).
CLD enabled the researchers to explore various combinations of metals and imidazoles and design resists specifically for B-EUV radiation. “By playing with the two components (metal and imidazole), you can change the efficiency of absorbing the light and the chemistry of the following reactions. And that opens us up to creating new metal-organic pairings. The exciting thing is there are at least 10 different metals that can be used for this chemistry, and hundreds of organics,” said Michael Tsapatsis, professor of chemical and biomolecular engineering at Johns Hopkins University, in a press release. “Because different wavelengths have different interactions with different elements, a metal that is a loser in one wavelength can be a winner with the other. Zinc is not very good for extreme ultraviolet radiation, but it’s one of the best for the B-EUV.” [1]
Researchers from the University of Osaka developed an annealing process that improves the performance and reliability of silicon carbide (SiC) transistors.
Previous approaches to improving SiC MOS performance introduced impurities such as nitrogen, which compromised reliability and limited operating voltage range. The team introduced a two-step high-temperature hydrogen annealing process, which is performed before and after gate oxide deposition. This removes defects at the oxide/SiC interface, resulting in a lower interface state density and higher channel mobility. Devices fabricated using the method demonstrated improved immunity against both positive and negative bias stress, expanding their operational voltage range.
“SiC MOS devices, despite being in mass production, haven’t yet reached their full potential in terms of performance and reliability,” said Takuma Kobayashi, a professor at the University of Osaka, in a statement. “Our findings offer a solution to this long-standing challenge and open up exciting new possibilities for SiC power devices.” [2]
Researchers from Nagoya University and Ming Chi University of Technology developed a new halogen-free method for etching hafnium oxide (HfO2) films that produces smooth and uniform surfaces, along with consistent etched depths through anisotropic etching.
Hafnium oxide (HfO2) has a high dielectric constant, thermal stability, and a wide band gap, making it appealing for ultrathin gate insulators in 2D material-based field-emission transistors and advanced nonvolatile memory devices.
“Conventional plasma-enhanced ALE methods for HfO2 typically rely on a combination of physical and chemical etching via halogen-based gases and high-energy ion bombardment to facilitate the removal of nonvolatile halides,” said Shih-Nan Hsiao, a professor at Nagoya University, in a statement. “However, the byproducts generated through physical sputtering often have low volatility, causing them to adhere to the chamber walls and feature sidewalls. This could impair the performance of electronic devices.”
The process involves irradiating HfO2 with alternating N2 and O2 plasmas using a low-pressure, high-density plasma generation device. The HfO2 surface was first bombarded with N+ ions with an applied bias voltage to bond nitrogen with the HfO2. The film was then treated with an O2 plasma without an applied bias voltage to eliminate the nitrogen-bonded surface layer. The etch depth could be controlled by applying RF power to the bottom electrode, for an etch depth between 0.023 and 0.107 nm/cycle. The cyclic etching technique also reduced surface roughness by 60% after 20 cycles.
Hsiao noted that the process is more sustainable than traditional HfO2 ALE: “Eliminating the use of halogen gases helps reduce environmental impacts. Performing the etching process at room temperature saves energy and simplifies the procedure, leading to lower manufacturing costs. Additionally, this process is clean and eliminates reaction byproducts.” [3]
[1] Y. Miao, S. Zheng, K.E. Waltz, et al. Spin-on deposition of amorphous zeolitic imidazolate framework films for lithography applications. Nat Chem Eng (2025). https://doi.org/10.1038/s44286-025-00273-z
[2] T. Kobayashi, H. Fujimoto, S. Kamihata, et al. Performance and reliability improvements in SiC(0001) MOS devices via two-step annealing in H2/Ar gas mixtures. 2025 Appl. Phys. Express 18 081002. https://doi.org/10.35848/1882-0786/adf6ff
[3] S.-N. Hsiao, P.-M. Yiu, L.-C. Chang, et al. (2025), Halogen-Free Anisotropic Atomic-Layer Etching of HfO2 at Room Temperature. Small Sci. 2500251. https://doi.org/10.1002/smsc.202500251
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