Why There Are Still No Commercial 3D-ICs


Building chips in three dimensions is drawing increased attention and investment, but so far there have been no announcements about commercial 3D-IC chips. There are some fundamental problems that must be overcome and new tools that need to be developed. In contrast, the semiconductor industry is becoming fairly comfortable with 2.5D integration, where individual dies are assembled on some k... » read more

Holistic Die-to-Die Interface Design Methodology For 2.5-D Multi-Chip-Module Systems


More than Moore technologies can be supported by system level diversification enabled by chiplet based integrated systems within multi-chip-modules (MCM) and silicon interposer based 2.5D systems. The division of large system-on-chip dies into smaller chiplets with different technology nodes specific to the chiplet application requirement enables the performance enhancement at system level whil... » read more

Wafer Shortage Improvement In Sight For 300mm, But Not 200mm


The supply chain for bare wafers is off-kilter. Demand is appreciably higher than the wafer suppliers can keep up with, creating shortages that could last for years. For 300mm starting wafers, the top five big players — SEH and Sumco of Japan, Siltronic of Germany, GlobalWafers of Taiwan, and SK Siltron of Korea — finally took action over the last year, spending billions on new wafer fac... » read more

Growth Spurred By Negatives


The success and health of the semiconductor industry is driven by the insatiable appetite for increasingly complex devices that impact every aspect of our lives. The number of design starts for the chips used in those devices drives the EDA industry. But at no point in history have there been as many market segments driving innovation as there are today. Moreover, there is no indication this... » read more

A Renaissance For Semiconductors


Major shifts in semiconductors and end markets are driving what some are calling a renaissance in technology, but navigating this new, multi-faceted set of requirements may cause some structural changes for the chip industry as it becomes more difficult for a single company to do everything. For the past decade, the mobile phone industry has been the dominant driver for the semiconductor eco... » read more

Confusion Grows Over Packaging And Scaling


The push toward both multi-chip packaging and continued scaling of digital logic is creating confusion about how to classify designs, what design tools work best, and how to best improve productivity and meet design objectives. While the goals of design teams remains the same — better performance, lower power, lower cost — the choices often involve tradeoffs between design budgets and ho... » read more

System-Level Packaging Tradeoffs


Leading-edge applications such as artificial intelligence, machine learning, automotive, and 5G, all require high bandwidth, higher performance, lower power and lower latency. They also need to do this for the same or less money. The solution may be disaggregating the SoC onto multiple die in a package, bringing memory closer to processing elements and delivering faster turnaround time. But ... » read more

‘More Than Moore’ Reality Check


The semiconductor industry is embracing multi-die packages as feature scaling hits the limits of physics, but how to get there with the least amount of pain and at the lowest cost is a work in progress. Gaps remain in tooling and methodologies, interconnect standards are still being developed, and there are so many implementations of packaging that the number of choices is often overwhelming. ... » read more

Scaling Up And Down


You don’t have to look very far in the semiconductor world before you see the word “scaling.” Perhaps you read an industry news article headline about transistor scaling – how those nearly nanoscale components are shrinking even smaller in size down to the atomic scale. Or maybe you heard a reference to memory capacity scaling – how our favorite mobile devices can store more high-reso... » read more

New Metrology and Inspection Technologies Needed for More-Than-Moore Markets


The escalating costs of following Moore’s Law have shifted the semiconductor industry’s focus to More-than-Moore (MtM) technologies, where analog/mixed-signal, RF, MEMS, image sensing, power or other technologies may be integrated with CMOS in a variety of planar, 2.5D and 3D architectures. The integration of these and other key technologies is enabling a host of fast-growing application... » read more

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