tag: Synopsys

Chiplet Momentum Rising
By Mark LaPedus - 26 Feb, 2020 - Comments: 0

The chiplet model is gaining momentum as an alternative to developing monolithic ASIC designs, which are becoming more complex and expensive at each node. Several companies and industry groups are rallying around the chiplet model, including AMD, Intel and TSMC. In addition, there is a new U.S. Department of Defense (DoD) initiative. The goal is to speed up time to market and reduce the cost... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 21 Feb, 2020 - Comments: 0

AI The European Union put out a white paper about artificial intelligence. The United States Chief Technology Officer Michael Kratsios criticized the EU stance on Thursday as clumsy. "We found, what they actually put out yesterday, really, I think, in some ways clumsily attempts to bucket AI-powered technologies as either ‘high-risk’ or ‘not high-risk,’” he said, according to a news ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 21 Feb, 2020 - Comments: 0

Dialog Semiconductor will acquire Adesto Technologies for $12.55 per share in cash, or for approximately $500 million enterprise value. Founded in 2006 and based in Santa Clara, CA, Adesto provides application-specific semiconductors, embedded systems, and specialty memory for IoT and industrial IoT applications. “This acquisition substantially enhances our position in the Industrial IoT mark... » read more

What’s In Your IP?
By Ed Sperling - 21 Feb, 2020 - Comments: 0

Jeff Markham, software architect at ClioSoft, talks with Semiconductor Engineering about IP traceability in markets such as automotive and aerospace, what’s actually in IP, what should not be in that IP from a security standpoint, and how all of this data can used to avert system reliability issues in the future. » read more

Blog Review: Feb. 19
By Jesse Allen - 19 Feb, 2020 - Comments: 0

Arm's Urmish Thakker takes a look at TinyML, some of the challenges in developing efficient architectures for resource constrained devices, and an explanation of Kronecker product compression. Mentor's Colin Walls considers whether it's better to use single or multiple returns for a function when writing understandable, readable code. Cadence's Paul McLellan shares highlights from a prese... » read more

Automotive Chip Design Workflow
By Ed Sperling - 17 Feb, 2020 - Comments: 0

Stewart Williams, senior technical marketing manager at Synopsys, talks about the consolidation of chips in a vehicle and the impact of 7/5nm on automotive SoC design, how to trade off power, performance, area and reliability, and how ISO 26262 impacts those variables. » read more

Week In Review: Design, Low Power
By Ed Sperling - 14 Feb, 2020 - Comments: 0

Processors Arm rolled out a micro neural processing unit that, when combined with its newest microcontroller, can increase machine learning performance by up to 480 times. The company is aiming the MCU and co-processor across a wide swath of applications. Worth noting is that Arm calls its Cortex-M55 an AI-capable processor, rather than a microcontroller, as the lines between the various proce... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 14 Feb, 2020 - Comments: 0

AI/Edge Arm putting AI (artificial intelligence) and machine learning (ML) on the Cortex-M processor by offering IP for a microNPU for Cortex-M. The company says in a press release that it will deliver a 480x uplift in ML performance. The new Cortex-M IP is Arm Ethos-U55 NPU, which Arm says is the industry’s first microNPU (neural processing unit). Arm is hoping the new IP will start an expl... » read more

How AI In Edge Computing Drives 5G And The IoT
By Ron Lowman - 13 Feb, 2020 - Comments: 0

Edge computing, which is the concept of processing and analyzing data in servers closer to the applications they serve, is growing in popularity and opening new markets for established telecom providers, semiconductor startups, and new software ecosystems. It’s brilliant how technology has come together over the last several decades to enable this new space starting with Big Data and the idea... » read more

Reducing Power At RTL
By Ann Mutschler - 13 Feb, 2020 - Comments: 0

Power management and reduction at the register transfer level is becoming more problematic as more heterogeneous elements are added into advanced designs and more components are dependent on interactions with other components. This has been a growing problem in leading-edge designs for the past couple of process nodes, but similar issues have begun creeping into less-sophisticated designs as... » read more

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