Chip Industry Week In Review


By Adam Kovac, Gregory Haley, and Liz Allan. Cadence plans to acquire BETA CAE Systems for $1.24 billion, the latest volley in a race to sell multi-physics simulation and analysis across a broad set of customers with deep pockets. Cadence said the deal opens the door to structural analysis for the automotive, aerospace, industrial, and health care sectors. Under the terms of the agreement, 6... » read more

Accellera Preps New Standard For Clock-Domain Crossing


Part of the hierarchical development flow is about to get a lot simpler, thanks to a new standard being created by Accellera. What is less clear is how long will it take before users see any benefit. At the register transfer level (RTL), when a data signal passes between two flip flops, it initially is assumed that clocks are perfect. After clock-tree synthesis and place-and-route are perfor... » read more

Chip Industry Week In Review


By Jesse Allen, Linda Christensen, and Liz Allan.  The Biden administration plans to invest more than $5B  for semiconductor R&D and workforce support, including in the National Semiconductor Technology Center (NSTC), as part of the rollout of the CHIPS Act. Today's announcement included at least hundreds of millions for the NSTC workforce efforts, including creating a Workforce Cente... » read more

Chip Industry Silos Are Crimping Advances


Change is never easy, but it is more difficult when it involves organizational restructuring. The pace of such restructuring has been increasing over the past decade, and often it is more difficult to incorporate than technological advancements. This is due to the siloed nature of the semiconductor industry, both within the industry itself, and its relationship to surrounding industries. Inc... » read more

Chip Industry Week In Review


By Jesse Allen, Gregory Haley, and Liz Allan Bosch, Infineon, and NXP were cleared in Germany to each acquire 10% of the European Semiconductor Manufacturing Co. (ESMC), established by TSMC, solidifying the supply chain against future shortages, particularly for automotive chips. “ESMC intends to build and operate another large semiconductor factory in Dresden, in which the three Europ... » read more

Rebalancing Test And Yield In IC Manufacturing


Balancing yield and test is essential to semiconductor manufacturing, but it's becoming harder to determine how much weight to give one versus the other as chips become more specialized for different applications. Yield focuses on maximizing the number of functional chips from a production batch, while test aims to ensure that each chip meets rigorous quality and performance standards. And w... » read more

Chip Industry Week In Review


By Susan Rambo, Gregory Haley, Jesse Allen, and Liz Allan President Biden issued an executive order on the “Safe, Secure, and Trustworthy Development and Use of Artificial Intelligence.” It says entities need to report large-scale computing clusters and the total computing power available, including “any model that was trained using a quantity of computing power greater than 1,026 inte... » read more

Anatomy Of A System Simulation


The semiconductor industry has greatly simplified analysis by consolidating around a small number of models and abstractions, but that capability is breaking down both at the implementation level and at the system level. Today, the biggest pressure is coming from the systems industry, where the electronic content is a small fraction of what must be integrated together. Systems companies tend... » read more

Chip Industry Week In Review


By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

Industry Pressure Grows For Simulating Systems Of Systems


Most complex systems are designed in a top-down manner, but as the amount of electronic content in those systems increases, so does the pressure on the chip industry to provide high-level models and simulation capabilities. Those models either do not exist today, or they exist in isolation. No matter how capable a model or simulator, there never will be one that can do it all. In some cases,... » read more

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