New Rules Put The Squeeze On Semiconductor Gray Market


The shift toward chiplets and multi-die assemblies is forcing big changes in the global supply chain, including much tighter cooperation between companies and governments to ensure the authenticity and quality of semiconductor parts. The chip industry has been looking to digital certificates as the best means of reducing counterfeiting and ensuring consistent quality for some time. The probl... » read more

Small Vs. Large Language Models


The proliferation of edge AI will require fundamental changes in language models and chip architectures to make inferencing and learning outside of AI data centers a viable option. The initial goal for small language models (SLMs) — roughly 10 billion parameters or less, compared to more than a trillion parameters in the biggest LLMs — was to leverage them exclusively for inferencing. In... » read more

Chip Industry Week in Review


San Francisco-based Substrate raised more than $100 million to build a vertically integrated foundry that uses particle accelerators to produce "the world's brightest beams, enabling a new method of advanced X-ray lithography." The company claims its technology is comparable to ASML's high NA EUV, and notes it can extend well beyond 2nm. ASML has not publicly commented. The Nexperia chip sho... » read more

New Frontiers In Fault Detection And Classification


IC manufacturers are increasingly relying on intelligent data processing to prevent downtime, improve yields, and reduce scrap. They are integrating that with fault detection and classification (FDC) to trace faults to their cause. Today’s FDC systems feature better sensors, variability control, and both predictive and prescriptive modeling. In the future, FDC will enable real-time decisio... » read more

Rethinking Security In Semiconductor Testing: Why Containment Is The New Imperative


It’s nearly impossible to keep up with the headlines without stumbling upon another major cybersecurity incident. According to recent reports, 2024 witnessed a staggering 5.5 billion breaches globally. In the United States alone, the average cost of a single data breach clocked in at $9.36 million—slightly lower than 2023’s figure, but still a significant hit for any organization. On a gl... » read more

Chip Industry Week in Review


SEMICON West was held in Phoenix this week, with presentations covering heterogeneous integration, AI, quantum, supply chain resilience, and more. Amid the buzz of the conference, some key manufacturing and test announcements were made this week: The strategic importance of the Phoenix area hub was highlighted. Amkor Technology broke ground this week on its advanced packaging and test camp... » read more

Chip Industry Week in Review


Samsung and SK hynix joined OpenAI's Stargate initiative to ensure there will be enough memory chips to meet the needs of AI data centers. The goal is to produce up to 900,000 DRAM wafer starts per month. OpenAI also inked agreements to explore the development of next-gen data centers in Korea. Axcelis Technologies (ion implantation systems) will merge with Veeco Instruments (compound semic... » read more

Chip Industry Week in Review


Amkor, TSMC, and Cadence partnered with Tesoro VC, which will serve as the lead operator of a new Global AI + Semiconductor Startup Hub and a Global Design Center in Phoenix, Arizona, aimed at chip innovation, startup growth, and advanced manufacturing. Nvidia will invest $5 billion in Intel common stock at a purchase price of $23.28 per share and the companies will collaborate on AI infrastru... » read more

Chip Industry Week in Review


The U.S. is considering annual approvals for Samsung and SK hynix to export chipmaking tools and materials to their factories in China, replacing perpetual waivers granted under the validated end user system, reports Bloomberg. The proposal, presented by the U.S. Commerce Department to South Korean officials, would require the companies to reapply each year for specific quantities of restricted... » read more

Making The Most of Test Resources


Semiconductor testing is undergoing multiple paradigm changes at once with the common goals of producing more known good die per month with low test cost. Achieving these goals requires a delicate balance between yield, quality, and test times. There are multiple ways to go about making better use of existing resources, many of which involve an increasing use of design for test (DFT) methods... » read more

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