Designing The AI Factories: Unlocking Innovation With Intelligent IP


The rapid evolution of artificial intelligence (AI) is reshaping the technological landscape, driving unprecedented demands on computing infrastructure. At the heart of this transformation lie innovations in intellectual property (IP) that enable scalable, efficient, and performance-driven AI factories. These advancements are central to addressing the technical challenges of modern AI workloads... » read more

Can Today’s Processor Architectures Be More Efficient?


For years, processors focused on performance, and that performance had little accountability to anything else. Performance still matters, but now it must be accountable to power. If small gains in performance result in disproportionate power gains, designers may need to discard such improvements in favor of more power-efficient ones. Although current architectures undergo a steady cadence of... » read more

Report: The AI Efficiency Boom


Artificial Intelligence (AI) is undergoing a fundamental transformation. While early AI models were large, compute-heavy, and dependent on cloud processing, a new wave of efficiency-driven innovations is moving AI inference—the generation of model results—to the edge. Smaller models, improved memory and compute performance, and the need for privacy, low latency, and energy efficiency are dr... » read more

AI In Chip Design: Tight Control Required


Executive Outlook: Semiconductor Engineering sat down with a panel of experts to talk about what's needed to effectively leverage AI, who benefits from it, and where software-defined hardware works best, with Bill Mullen, Ansys fellow; John Ferguson, senior director of product management at Siemens EDA; Chris Mueth, senior director of new markets and strategic initiatives at Keysight; Albert Ze... » read more

Cognichip: Using AI To Speed Complex Chip Design


AI software innovation is accelerating, while the chip design process is struggling to keep pace due to rising complexity and physical constraints. The big challenge now is how to close that gap. The solution is at least as complex as the hardware design. It requires much greater reuse of IP, along with portions of existing designs, so that not everything needs to be created from scratch. AI... » read more

Data Center CPU Dominance Is Shifting To AMD And Arm


Fig. 1: Created by ChatGPT from a text prompt. The data center processor market has seen two major tectonic shifts in the last decade. It used to be that all data center compute was x86, and well more than 90% of that was Intel. GPUs first appeared in the data center in 2016 (Pascal GPU). Now, the majority of computation is done on GPUs. AMD is looking to pass Intel in x86 share, and... » read more

GenAI’s Breakneck Pace Is Reshaping The Semiconductor Industry


Humankind is witnessing a technological revolution so extreme that its full magnitude might extend beyond the scope of our intellect. Generative AI (GenAI) is doubling its performance every six months [1], outpacing Moore's law in what the industry calls Hyper Moore's Law. Some cloud AI chipmakers expect to double or triple performance every year for the next ten years [2]. In this three-part b... » read more

The Data Dilemma In Semiconductor Testing And Why It Matters: Part 2


In Part 1, we explored the challenges of implementing machine learning and real-time analytics in semiconductor testing—chiefly, the difficulty of transferring device test data across multiple locations and organizations. In this post, we introduce Data Feed Forward (DFF) as it applies to ACS Advantest. What is ACS DFF? ACS DFF is a cloud-enabled solution designed to simplify, secure... » read more

EDA Startups At DAC 2025


The 62nd DAC showcased numerous new exhibitors in 2025, including tool and IP providers, design services firms, and component marketplaces. New EDA startups, in particular, had a robust showing, with entrepreneurial engineers seeking to tackle the increasingly complex challenges facing modern chip design with fresh approaches. AI was a strong theme throughout the show, with companies of all ... » read more

Shrinking LLMs With Self-Compression


Language models are becoming ever larger, making on-device inference slow and energy-intensive. A direct and surprisingly effective remedy is to prune complete channels whose contribution to the task is negligible. Our earlier work introduced a training-time procedure – Self-Compression [1, 4] – that lets back-propagation decide the bit-width of every channel, so unhelpful ones fade away. T... » read more

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