Ansys Buys Apache


By Ed Sperling Ansys plans to acquire Apache Design Solutions, rounding out its lineup of simulation software with expertise in low-power analysis. Ansys will pay $310 million in cash, which includes $29 million in cash that Apache already has on its books. The timing is particularly interesting because Apache announced its plans to go public with a $75 million IPO in March. The last compan... » read more

5 Ways To Cut Power


By Ed Sperling Low energy consumption with minimal leakage has emerged as the most competitive element in an IC design, regardless of whether it involves a plug, a battery, or whether it’s powered by a gasoline engine. While components on an SoC aren’t always power-aware, they’ll have to be in the future as consumers focus first on energy efficiency. With rising fuel costs, a concern ... » read more

Managing Physical Effects


By Ann Steffora Mutschler Managing the physical effects from manufacturing is becoming increasingly critical as designs grow in size and process geometries dive lower. Just keeping track of these effects in a billion-gate design is a daunting task. At advanced manufacturing nodes, the capacitance and inductance effects make the design much harder—and that includes both on-die and off-die ... » read more

Experts At The Table: Power Budgeting


By Ed Sperling Low-Power Engineering sat down with Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Cary Chin, director of technical marketing for low-power solutions at Synopsys; Vic Kulkarni, general manager of the RTL business unit at Apache Design Solutions; Matt Klein, principal engineer for power and broadcast applications at Xilinx; and Paul ... » read more

Experts At The Table: Power Budgeting


Low-Power Engineering sat down with Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Cary Chin, director of technical marketing for low-power solutions at Synopsys; Vic Kulkarni, general manager of the RTL business unit at Apache Design Solutions; Matt Klein, principal engineer for power and broadcast applications at Xilinx; and Paul van Besouw, presi... » read more

Extraction, Power And Final Silicon


By Ann Steffora Mutschler As semiconductor technology scales down, manufacturing effects are coming front and center, putting constant pressure on design teams to make sure that silicon can be modeled through the extraction process while performing analysis accurately. Extraction technology is one of the basic components needed to gain an accurate measurement of power, timing and signal int... » read more

Top 5 Reasons For Power Delivery Failure


By Matt Elmore Technology scaling has brought with it a myriad of causes for power delivery network (PDN) failure. Even a few years ago, it was simply enough to run static and dynamic power analysis to expose any voltage drops caused by weak power routing. No one cared about modeling the package and PCB. To account for clock jitter, you could simply throw in a whole nanosecond of clock uncerta... » read more

Power Noise Analysis For Next Generation ICs


In advanced technology nodes, SoC designs face complex power supply challenges driven by changes such as higher gate placement density, smaller wire and via geometries, and lower supply voltages in sophisticated, multi-layered packages and boards. The challenges associated with power delivery networks (PDN) anywhere on the die, package and board designs can be seen in all types of ICs, includin... » read more

Experts At The Table: Power Budgeting


Low-Power Engineering sat down with Barry Pangrle, solutions architect for low-power design and verification at Mentor Graphics; Cary Chin, director of technical marketing for low-power solutions at Synopsys; Vic Kulkarni, general manager of the RTL business unit at Apache Design Solutions; Matt Klein, principal engineer for power and broadcast applications at Xilinx; and Paul van Besouw, presi... » read more

EDA’s Big Challenge


By Ann Steffora Mutschler It is not news to anyone that the growth rate of the EDA industry has been less than impressive, to put it politely. Traditional EDA implementation tools have hit commodity status and something’s got to change. Thankfully, there are a host of challenges coming in the form of system-level (and higher) design, not to mention what will be required for true 3D chips. ... » read more

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