tag: Applied Materials

Blog Review: Jan. 4
By Jesse Allen - 04 Jan, 2017 - Comments: 0

Mentor's Harry Foster wraps up his functional verification study series with a look the impact of verification maturity and safety critical designs on first silicon success. Synopsys' David Benas argues for using the insurance industry as a model in assessing the risk of potential software flaws. Cadence's Tom Anderson shares highlights from the recent International Workshop on Microproce... » read more

Blog Review: Dec. 21
By Jesse Allen - 21 Dec, 2016 - Comments: 0

Mentor's Jeff Miller and ARM's Nandan Nayampally contend that it's easier than ever to design custom SoCs. Cadence's Paul McLellan provides a basic primer on silicon photonics, from a presentation by Gilles Lamant. The US Department of Transportation is considering requiring the inclusion of vehicle-to-vehicle communication in new cars, says Synopsys' Robert Vamosi. Applied's Shekar Kr... » read more

Foundries See Mixed Future
By Mark LaPedus - 21 Dec, 2016 - Comments: 1

Amid a tumultuous business environment, the silicon foundry industry is projected to see steady growth in a number of process segments in 2017. As in past years, the foundry market is expected to grow faster than the overall IC industry in 2017. But at the same time, the IC industry—the foundry customer base—continues to witness a frenetic wave of merger and acquisition activity. Basical... » read more

Uncertainty Grows For 5nm, 3nm
By Mark LaPedus - 19 Dec, 2016 - Comments: 4

As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. [getentity id="22586" comment="TSMC"] recently announced plans to build a new fab in Taiwan at a cost of $15.7 billion. The proposed fab is targeted to manufacture TSMC’s 5nm and 3nm processes, whic... » read more

Etching Technology Advances
By Jeff Dorsch - 15 Dec, 2016 - Comments: 0

Let’s get really, really small. That directive from leading semiconductor companies and their customers is forcing the whole semiconductor supply chain to come up with new ways to design and manufacture ever-shrinking dimensions for chips. The current push is to 10nm and 7nm, but R&D into 5nm and 3nm is already underway. To put this in perspective, there are roughly two silicon atom... » read more

Inside Advanced Patterning
By Mark LaPedus - 15 Dec, 2016 - Comments: 0

Prabu Raja, group vice president and general manager for the Patterning and Packaging Group at [getentity id="22817" e_name="Applied Materials"], sat down with Semiconductor Engineering to discuss the trends in patterning, selective processes and other topics. Raja is also a fellow at Applied Materials. What follows are excerpts of that conversion. SE: From your standpoint, what are the big... » read more

Fab Tool Biz Faces Challenges In 2017
By Mark LaPedus - 15 Dec, 2016 - Comments: 3

After experiencing a gradual recovery and positive growth in 2016, the semiconductor equipment industry sees a mixed picture as well as some uncertainty in 2017. In the near term, though, business is robust. Several chipmakers started to place a sizeable number of fab tool orders in the latter part of 2016, particularly in three areas—3D NAND, logic and foundry. Now, after buying the in... » read more

More Than Just Carbon Dioxide
By Katherine Derbyshire - 14 Dec, 2016 - Comments: 0

As discussed in Part Two of this series, lifecycle analyses of greenhouse gas emissions consider both direct and indirect sources. Indirect CO2 emissions, attributed to electricity and other forms of energy purchased by the fab, are the semiconductor industry’s single largest environmental impact. Of those emissions, a large fraction are attributable to plasma-based etch and deposition steps,... » read more

Can We Measure Next-Gen FinFETs?
By Mark LaPedus - 21 Nov, 2016 - Comments: 6

After ramping up their respective 16nm/14nm finFET processes, chipmakers are moving towards 10nm and/or 7nm, with 5nm in R&D. But as they move down the process roadmap, they will face a new set of fab challenges. In addition to lithography and interconnects, there is metrology. Metrology, the science of measurements, is used to characterize tiny films and structures. It helps to boost yi... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 18 Nov, 2016 - Comments: 0

Chipmakers Next month, GlobalFoundries will host a job fair in Portland, Ore., according to reports. The company hopes to hire former Intel workers. These are workers who lost their jobs as part of Intel's recent layoff. Anokiwave, a developer of chips for the mmWave market, has announced a foundry alliance with GlobalFoundries. GlobalFoundries will make so-called Silicon Core chips on a f... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy