Prototyping Partitioning Problems


Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

One-On-One: Mike Muller


Arm CTO Mike Muller sat down with Semiconductor Engineering to discuss a wide range of technology and market shifts, including the impact of machine learning, where new market opportunities will show up and how the semiconductor industry will need to change to embrace them. What follows are excerpts of that conversation. SE: It's getting to the point where instead of just developing chips, w... » read more

Tech Talk: Verification


Frank Schirrmeister, Cadence's senior group director for verification platforms, talks about what's changing in verification with 5G, machine learning, greater connectivity, advanced packaging, and the growing need to build security into designs. https://youtu.be/GMF8BkmdJzE » read more

Lowering The Barriers To Entry For ASICs


The future of IoT and its rate of scalability depends upon increased functionality in the smallest form factors. Arm knows that OEMs are increasingly turning to custom SoCs/ASICs for a wealth of benefits: differentiation, cost savings, improved reliability, and smaller products. So, at Arm, we wanted to better understand the perceived risks involved for OEMs – what makes custom SoCs a task... » read more

Different Approaches To Security


Everyone acknowledges the necessity for cybersecurity precautions, yet the world continues to be challenged by an invisible, inventive army of hackers. The massive data breach at Equifax was only the latest in a series of successful cyberattacks on the credit monitoring firm. Lessons learned from the previous breaches apparently didn’t mitigate this year’s embarrassment for the company. ... » read more

Blog Review: Nov. 29


ANSYS' Robert Harwood offers a reminder that autonomous and assisted driving technology are still very much works in progress, and flawed ones at that. It will take an estimated 5 billion to 10 billion road miles to effectively train self-driving algorithms. So far, Google has logged about 3.5 million miles. Along the same lines, Mentor's Paul Johnston takes a look at the electric car market... » read more

The New Road Warriors


Chip vendors and other companies that have little or no experience in automotive are flooding into this market as the race for assisted and autonomous driving begins to heat up. This market is expected to pay big dividends for companies that succeed in helping to build the vehicles of the future in this century. IC Insights earlier this year forecast the auto chip market would grow 22% this ... » read more

Week In Review: Design


Acquisitions Marvell signed a definitive agreement to buy Cavium for roughly $6 billion. The deal is expected to close in mid-2018. The Cavium deal fits squarely on the cloud side and gives Marvell a much bigger reach into enterprise networking and infrastructure, as well as some developing markets. Siemens paid an undisclosed price to buy Solido Design Automation, which tracks variation i... » read more

Blog Review: Nov. 22


ARM's Jem Davies talks about an upcoming documentary on AI and where the lines need to be drawn between machine intelligence and human emotional intelligence. Mentor's Saunder Peng examines the impact of merging physical verification databases, which can cost time and resources, and how that can be streamlined. Cadence's Paul McClellan takes a look back at the Xerox Alto and how it change... » read more

The Week In Review: Design


Tools Aldec released the latest version of its Riviera-PRO verification platform, adding QEMU Bridge to enable hardware/software co-simulation of designs intended to run on SoC FPGAs. Other features include improved performance when using code containing many inline randomized calls and up to 29% faster simulation speed of UVM. Pulsic added new features to its Unity Bus Planner for planning... » read more

← Older posts Newer posts →