Chip Industry Week In Review


Deals: NVIDIA inked a $20B non-exclusive licensing deal with Groq for its inference technology. The startup's founder, Jonathan Ross, and some other employees will join NVIDIA to assist in scaling and advancing the technology. The non-exclusive licensing deal, versus an outright purchase, is a tool other companies have used to avoid antitrust regulation. Samsung Ventures made a strategic inv... » read more

Blog Review: Dec. 24


Cadence's Jakob Engblom shares highlights from the recent SDV Europe conference, including why software-defined vehicles will require much closer, faster collaboration between suppliers and customers, with virtualization for software development and testing taking on a key role, as well as API questions and tire sensors. Synopsys' Tom De Schutter and Marc Serughetti predict that new cars wil... » read more

Blog Review: Dec. 17


Cadence's Shyam Sharma checks out what's new in the latest Open NAND Flash Interface 5.2 standard, including a Separate Command Address protocol that allows Hosts to optimize the command and data scheduling to increase overall available bandwidth. Siemens' Kyle Fraunfelter and Melville Bryant contend that improving semiconductor manufacturing and fab sustainability starts with a digital twin... » read more

Chip Industry Week in Review


Deals of the week: Arteris announced plans to acquire cybersecurity provider Cycuity. “Expanding our technology portfolio to include Cycuity’s hardware security assurance products will enable our customers to achieve secure on-chip data movement,” said Charlie Janac, chairman and CEO of Arteris. Qualcomm acquired Ventana Micro Systems, a maker of RISC-V data center-class CPU IP. ... » read more

Rethinking The Role Of CPUs In AI: A Practical RAG Implementation


In many enterprise environments, engineers and technical staff need to find information quickly. They search internal documents such as hardware specifications, project manuals, and technical notes. These materials are often scattered, making traditional search inefficient. These documents are often confidential or proprietary. This constraint prevents these documents from being processed by... » read more

Chiplets Vs. Soft IP: Different In Almost Every Way


Chiplets serve a similar function as the soft IP widely used in chips today, but the similarities end there. While both can speed time to market and enable design teams to focus limited resources where they can best be applied, the implementation, manufacturing, test, and long-term business requirements wrought by a chiplet marketplace would be very different. Soft IP (also known as RTL IP) ... » read more

Arm Performance Cookbook: Your Guide to Optimal Design and Verification (EBook)


The Performance Cookbook for Arm is your essential resource for mastering the complexities of system-level performance, architecture exploration, and SoC verification. Why Download the Performance Cookbook? In-Depth Exploration - Dive into the evolution of Arm compute subsystem architectures, with detailed coverage on how critical components interact to deliver optimal performance be... » read more

Guidance For Using SystemReady On Automotive Platforms


Automotive platforms can significantly benefit from adopting the Arm SystemReady Devicetree Band as the basis for their platform firmware. By aligning with the SystemReady Devicetree Band and the recommended optional features in this document, platforms can support use cases such as secure boot and update, hardware discovery, power-state coordination, hardware fault detection, and system-level ... » read more

Small Language Models Create New Security Risks


The rollout of edge AI is creating new security risks due to a mix of small language models (SLMs), their integration into increasingly complex hardware, and the behavior and interactions of both over time. AI data centers still garner the most attention due to massive investments and an ongoing flood of deals and acquisitions, but the edge is quietly starting to take shape for several reaso... » read more

Blog Review: Dec. 3


Cadence's Reela Samuel notes that as multi-die integration becomes the new engine of semiconductor performance, the decision between 2.5D and 3D-IC architectures shapes a design's achievable bandwidth, energy efficiency, thermal limits, system size, and even program schedules. Synopsys' Thomas Andersen suggests that the deployment of physical AI will require the fusion of advanced electronic... » read more

← Older posts Newer posts →