tag: Cadence

Exploring The Use Of Virtual Platforms At The Electronic System Level
By Cheryl Ajluni - 27 Mar, 2009 - Comments: 0

By Cheryl Ajluni System design is hard. That should not come as a surprise to anyone these days. With design geometries shrinking and device complexity on the rise, this fact is not likely to change anytime soon. One concept for easing that burden for system-level designers is the virtual platform. Granted, the concept itself is nothing new, but today it is being employed in ever more creativ... » read more

Trends in System-Level Prototyping
By Various Writers - 27 Mar, 2009 - Comments: 0

By Clive Maxfield One problem with electronics is that certain terms can mean different things, depending on who one is talking to at the time. Even worse, some terms have a tendency to evolve over time. This means that when we are presented with a topic like "Trends in System-Level Prototyping," before leaping headfirst into the fray, it may be a good idea to first define exactly what we mean... » read more

Verifying Low-Power IP And Designs
By Ed Sperling - 13 Mar, 2009 - Comments: 0

By Ed Sperling Verification has always been the time-consuming part of designs. Even at 120nm and above, where power wasn’t much of an issue, verification accounted for an estimated 70 percent of the non-recurring engineering expense in a chip. Since then, the tools to automate design have become more effective, but the complexity of designs has grown by leaps and bounds beyond those tools.... » read more

Low-Power Standards War
By Ann Mutschler - 13 Mar, 2009 - Comments: 0

To the uninitiated, establishing a technology standard may seem straightforward. In reality, the process is mired with technical and political issues as evidenced by the ongoing battle for a de facto low-power design standard between the Unified Power Format (UPF) and the Common Power Format (CPF).   Currently, UPF is with the IEEE for final ratification as P1801, set for vote this month, ... » read more

Plumbing 101: Current Leakage And What to Do About It
By Brian Fuller - 13 Mar, 2009 - Comments: 0

By Brian Fuller Rising demand for mobile products and the march of Moore’s Law have created conditions for a perfect storm that threatens to swamp electronics designs and the market growth those designs target. The catalyst for that storm is leakage, which worsens the smaller devices become. Even in an “off” state, systems can leak like poorly insulated houses. But as the nation think... » read more

Who’s Out, Who’s In
By Ed Sperling - 21 Jan, 2009 - Comments: 0

The EDA world is either doing better than most segments of the economy or coming apart at the seams, depending upon your perspective and your definition of exactly what an EDA company is. But at least one trend seems clear: As we push into the world of system-level design from chip design and SoCs instead of ASICs, the high-level trend is broader companies with more complete integrated packag... » read more

Can SaaS Really Make Chip Design Easier?
By Cheryl Ajluni - 17 Dec, 2008 - Comments: 0

By Cheryl Ajluni Software as a Service (SaaS) is not a technology. It is a software deployment business model where an application is hosted as a service that is provided to customers across the Internet. Thanks to success stories from companies like Google, Salesforce.com, WebEx, and TurboTax, among others, this business model has become quite popular and is now even being looked at by some E... » read more

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