Graph-Based, Formal Equivalence Checking Method

A new research paper titled "Equivalence Checking of System-Level and SPICE-Level Models of Linear Circuits" was published by researchers at University of Bremen and DFKI GmbH. Abstract: "Due to the increasing complexity of analog circuits and their integration into System-on-Chips (SoC), the analog design and verification industry would greatly benefit from an expansion of system-level met... » read more