tag: CyberOptics

Measuring Reflective Surfaces
By Subodh Kulkarni - 15 Jun, 2020 - Comments: 0

Manufacturers are adopting automated optical inspection (AOI) systems based on phase shift profilometry (PSP) for applications in advanced packaging processes. Many of these processes use front end-like techniques to create connections among die within a package and from the packaged die to the outside world. The technique offers fast, precise measurements of the 10µm to 100µm features that a... » read more

Using Fab Sensors To Reduce Auto Defects
By Anne Meixner - 09 Jun, 2020 - Comments: 0

The semiconductor manufacturing ecosystem has begun collaborating on ways to effectively use wafer data to meet the stringent quality and reliability requirements for automotive ICs. Silicon manufacturing companies are now leveraging equipment and inspection monitors to proactively identify impactful defects prior to electrical test. Using machine learning techniques, they combine the monitor ... » read more

NanoResolution MRS Sensor Delivers Fast, Precise 3D Inspection And Measurement For Advanced Semiconductor Packaging Applications
By CyberOptics - 08 Jun, 2020 - Comments: 0

The semiconductor packaging industry continues to advance, with new designs adding more layers, finer features and more I/O channels to achieve faster connections, higher bandwidth and lower power consumption. As packaging technologies have evolved, manufacturers have adapted old processes and adopted new processes to connect chips to each other and to the outside world. Often these new process... » read more

The Need for Speed
By Subodh Kulkarni - 01 Jun, 2020 - Comments: 0

We’ve previously identified the convergence occurring between surface mount technologies (SMT), used to connect packaged semiconductor devices on printed circuit boards, and advanced packaging (AP) technologies, in which connections between the semiconductor devices and to the outside world are incorporated in the packaging process using front-end-like, wafer-or panel-based manufacturing proc... » read more

The Good And Bad Of Chiplets
By Mark LaPedus - 27 May, 2020 - Comments: 1

The chiplet model continues to gain traction in the market, but there are still some challenges to enable broader support for the technology. AMD, Intel, TSMC, Marvell and a few others have developed or demonstrated devices using chiplets, which is an alternative way to develop an advanced design. Beyond that, however, the adoption of chiplets is limited in the industry due to ecosystem issu... » read more

New Uses For Manufacturing Data
By Ed Sperling - 12 May, 2020 - Comments: 0

The semiconductor industry is becoming more reliant on data analytics to ensure that a chip will work as expected over its projected lifetime, but that data is frequently inconsistent or incomplete, and some of the most useful data is being hoarded by companies for competitive reasons. The volume of data is rising at each new process node, where there are simply more things to keep track of,... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 24 Apr, 2020 - Comments: 0

Chipmakers Select foundries are beginning to ramp up their new 5nm processes with 3nm in R&D. There are already signs that the foundries have pushed out their 3nm production schedules. So, expect 7nm and 5nm to become long-running nodes. At 3nm, Samsung and TSMC are going in different directions. Samsung is developing a gate-all-around (GAA) technology called nanosheet FETs. TSMC will e... » read more

Metrology Challenges For Gate-All-Around
By Mark LaPedus - 16 Apr, 2020 - Comments: 3

Metrology is proving to be a major challenge for those foundries working on processes for gate-all-around FETs at 3nm and beyond. Metrology is the art of measuring and characterizing structures in devices. Measuring and characterizing structures in devices has become more difficult and expensive at each new node, and the introduction of new types of transistors is making this even harder. Ev... » read more

The Convergence Of Advanced Packaging And SMT
By Subodh Kulkarni - 07 Apr, 2020 - Comments: 0

One statement is almost always true in the electronics industry: smaller is better. The relentless demand for electronic systems that pack more computing power and functionality into less space has driven the development of new processes and designs since the invention of the integrated circuit. In recent years that drive has taken a new direction, literally, as manufacturers have discovered th... » read more

Reliability Challenges Grow For 5/3nm
By SE Staff - 07 Apr, 2020 - Comments: 0

Ensuring that chips will be reliable at 5nm and 3nm is becoming more difficult due to the introduction of new materials, new transistor structures, and the projected use of these chips in safety- and mission-critical applications. Each of these elements adds its own set of challenges, but they are being compounded by the fact that many of these chips will end up in advanced packages or modul... » read more

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