tag: EDA

Week In Review: System-Level Design
By Ed Sperling - 07 Feb, 2014 - Comments: 0

Cadence agreed to buy Forte Design Systems for an undisclosed sum, adding further proof that the market for high-level synthesis and tools that run at higher levels of abstraction is finally hitting its stride. Behind this acquisition is a rising pain level due to increasing complexity in SoCs—IP integration, low power concerns and much more of everything, from transistors to memories—has f... » read more

A Different Kind Of Sales Job
By Ed Sperling - 30 Jan, 2014 - Comments: 0

For years EDA companies have been pitching the benefits of ESL tools and high-level modeling, and for just as many years chipmakers have been throwing that idea back at tools vendors saying it’s too expensive to retool. Talks between the two have waffled between polite bickering and contentious negotiations. Chipmakers have approached these “talks” from the stronger bargaining position... » read more

Patents Under Scrutiny
By Brian Bailey - 30 Jan, 2014 - Comments: 2

After years of complaints by high-tech companies that the U.S. patent system is misused, too slow or completely outdated, patent attorneys are about to get their day in court. The U.S. Supreme Court has agreed to review an appeal between Alice Corp., an electronic marketplace for trading IP, and CLS Bank International, involving what kinds of inventions can be patented, according to the Supr... » read more

2014 Accellera Standards Are Built on Powerful Shoulders
By Accellera - 27 Jan, 2014 - Comments: 0

By Adam Sherer Looking out at the fresh snow coating the landscape here in Buffalo, it’s tempting to look toward 2014 and focus only on the fresh and new. However, if I’ve learned anything about this city from the day I arrived here as a freshman EE in 1984, it’s that you don’t bury your foundation. Instead, you recognize it as your greatest strength, the powerful shoulders upon whic... » read more

A Perspective On Open Process Specification
By Ted Paone - 27 Jan, 2014 - Comments: 2

It is the job of the Process Design Kit (PDK) engineers to deliver a high-quality PDK that properly represents the process requirements and constraints and supports the design flows used by their customers. The PDK engineer takes multiple inputs describing the process and the devices and circuitry in the process and generates the output in the form of OpenAccess technology libraries (techDB), d... » read more

Power’s Impact On Hierarchy Modification
By Ann Mutschler - 16 Jan, 2014 - Comments: 2

RTL restructuring in which the logical hierarchy of a design is modified is usually done to manage complex designs. When power management is added to this task, new challenges crop up. Consider switchable power or voltage domains, which are a common way to manage power is to use switchable power or voltage domains. When implementing this technique, all the logic in such a domain must hang of... » read more

Power Resolutions For 2014
By Mark Baker - 16 Jan, 2014 - Comments: 0

As the ball dropped at midnight in New York’s Time Square, signifying the beginning of 2014, many had already decided on their resolutions for the New Year. Others decide during the first few days of the New Year. Undoubtedly, consideration involves common resolutions that we fall back on year after year. Individuals might think about health, losing weight and becoming more fit. Others think ... » read more

EDA And IP Revenue Up Again
By Ed Sperling - 14 Jan, 2014 - Comments: 0

The EDA and IP market showed continued growth again in Q3 of 2013, according to just-released statistics from the EDA Consortium. Total revenue was $1.729 billion, up 6.8% from the $1.619 billion reported in the same period in 2012. Wally Rhines, board sponsor for EDAC’s Market Statistics Service and chairman and CEO of Mentor Graphics, said the numbers showed stability and growth, but no ... » read more

Experts At The Table: Yield And Reliability Issues With Integrating IP
By Ed Sperling - 08 Jan, 2014 - Comments: 0

Semiconductor Engineering sat down to discuss the impact of integrating IP in complex SoCs with Juan Rey, senior director of engineering at Mentor Graphics; Kevin Yee, product marketing director for Cadence’s SoC Realization Group; and Mike Gianfagna, vice president of marketing at eSilicon. What follows are excerpts of that conversation. SE: Do we need to move to subsystems or more restri... » read more

Blog Review: Jan. 2
By Ed Sperling - 02 Jan, 2014 - Comments: 0

ARM’s Lori Kate Smith has been scouring the market for cool devices. Her pick: the Epic Giveaway wrist computer for runners. She says the only drawback is the 10-hour battery life, but if you can run that long and still have some juice left in your body you probably need a GPS, instead. Mentor’s J VanDomelen has been tracking orders from the United Arab Emirates’ and its neighbors for ... » read more

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