tag: EDA

FinFET Learning
By Ed Sperling - 08 May, 2014 - Comments: 0

FinFETs are not simple to work with. They’re difficult to manufacture, tricky to design, and they run the risk of greatly increased dynamic power density—particularly at 14/16nm, where extra margin is hard to justify—which affects everything from electromigration to signal integrity. Moreover, while finFETs have been on the drawing board for more than a decade, it’s taken four years ... » read more

Productive Clock Domain Crossing Verification
By Kiran Vittal - 08 May, 2014 - Comments: 2

Recently, we were invited to participate in an internal Chips@Cisco event along with other EDA vendors and FPGA providers. Executives from these vendors participated in a panel to discuss the challenges seen by the technology leaders in FPGAs and what it means to the industry. Everyone on the panel agreed that design size and complexity, including clock domains, is continuing to follow Moore’... » read more

Low-Power SoC Design
By Anand Iyer - 08 May, 2014 - Comments: 1

Over the last decade, power has become the primary design constraint for all SoC designs. While power reduction started in mobile market segments due to the battery considerations, it quickly has become equally important to powerline applications due to the cooling costs. Today, CPUs define a power constraint called Thermal Design Power (TDP) for the market it operates. One of the definition... » read more

Executive Insight: Wally Rhines
By Ann Mutschler - 05 May, 2014 - Comments: 1

Semiconductor Engineering sat down with Wally Rhines, chairman and CEO of Mentor Graphics, to discuss what is required for EDA to grow, key areas of opportunity for EDA growth and going against the grain. The interview is part of an ongoing series of in-depth interviews with top executives from all segments of the industry. SE: What keeps you awake at night? Rhines: Actually nothing keeps... » read more

A Guide To Advanced Process Design Kits
By Ernest Worthman - 14 Apr, 2014 - Comments: 1

The increasing complexity of design enablement has prompted manufacturers to optimize the design process. New tools and techniques, thanks to next-generation hardware and software, have provided a new platform for semiconductor and wafer design. Advanced PDKs are the solution and have been developed by foundries to optimize the design process and leverage and reuse intellectual property (IP) an... » read more

Executive Insight: Simon Davidmann
By Brian Bailey - 10 Apr, 2014 - Comments: 0

Every industry has some colorful characters and within the EDA industry, Simon Davidmann is certainly one that comes to mind. For the past 30-something years, Davidmann has provided guidance to the industry, stood up for what he believes in, been an inspiration to many entrepreneurs, and had some fun along the way. Simon is a serial entrepreneur, angel investor and he has been a key person invo... » read more

Pain Management
By Ed Sperling - 10 Apr, 2014 - Comments: 0

In part one of this series, the focus was on overlapping and new pain points in the semiconductor flow, from initial conception of what needs to be in a chip all the way through to manufacturing. Part two looks at how companies are attempting to manage that pain. It’s no secret that [getkc id="81" kc_name="SoC"]s are getting more complicated to design, debug and build, but the complexity i... » read more

Blog Review: April 2
By Ed Sperling - 02 Apr, 2014 - Comments: 0

Mentor’s Nazita Saye compares roadway roundabouts to networked systems. One roundabout works fine, but add in a bunch of them and you have a massive traffic jam. How many roundabouts are in your design? Cadence’s Richard Goering interviews Stan Kroliskoski, chair of the IEEE Design Automation Standards Committee, about four working groups on EDA standards and what’s ahead. Speaking ... » read more

EDA Sales Up Again
By Ed Sperling - 01 Apr, 2014 - Comments: 0

EDA continued to post strong growth, setting records as an industry and proving the resilience of the tools industry, which has been showing positive numbers for 16 consecutive quarters. Revenue for Q4 of 2013 were $1.881 billion, up from $1.779 billion in the same period in 2012, according to numbers provided by the EDA Consortium. For the year, revenue hit $6.932 billion, up 6.1% from annu... » read more

EDA Shapes Its Future
By Brian Bailey - 27 Mar, 2014 - Comments: 2

In part one of this series, Semiconductor Engineering looked at growth within the EDA industry and the types of approaches being made to expand the scope of the markets that they serve. Scope expansion comes from the creation of new tools, the growth of companies in the IP space and the various ways in which opportunities can be found in new markets. Additional growth opportunities come from so... » read more

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