tag: electromigration

Transistor-Level Verification Returns
By Brian Bailey - 13 Jan, 2016 - Comments: 1

A few decades ago, all designers did transistor-level verification, but they were quite happy to say goodbye to it when standard cells provided isolation at the gate-level and libraries provided all of the detailed information required, such as timing. A few dedicated people continued to use the technology to provide those models and libraries and the most aggressive designs that wanted to stri... » read more

Rethinking Memory
By Ed Sperling - 16 Dec, 2015 - Comments: 3

Getting data in and out of memory is as important as the speed and efficiency of a processor, but for years design teams managed to skirt the issue because it was quicker, easier and less expensive to boost processor clock frequencies with a brute-force approach. That worked well enough prior to 90nm, and adding more cores at lower clock speeds filled the gap starting at 65nm. After that, th... » read more

Reflections On 2015
By Brian Bailey - 10 Dec, 2015 - Comments: 0

It is easy to make predictions, but few people can make them with any degree of accuracy. Most of the time, those predictions are forgotten by the end of the year and there is no one to do a tally of who holds more credibility for next year. Not so with Semiconductor Engineering. We like to hold people's feet to the fire, but while the "Pants-On-Fire" meter may be applicable to politicians, we ... » read more

System-Aware Full-Chip Power Integrity And Reliability
By Calvin Chew - 12 Nov, 2015 - Comments: 0

At the core of every electronics system is a chip that has to meet multiple conflicting requirements such as increased functionality, best power efficiency, highest reliability, lowest design cost and short design schedule. Meeting these requirements poses a major challenge, especially for systems on chip (SoCs) that are designed using advanced processes. Ensuring that the SoCs meet power an... » read more

Accurate Thermal Analysis, Including Thermal Coupling Of On-Chip Hot Interconnect
By Norman Chang - 15 Oct, 2015 - Comments: 0

Driven by rapid advancement in mobile/server computing and automotive/communications, SoCs are experiencing a fast pace of functional integration along with technology scaling. Advanced low power techniques are widely used, while meeting higher performance requirements using a variety of packaging technologies. The Internet of Things (IoT) is further opening up new applications with connected d... » read more

Making Cars Better
By Jérôme Toublanc - 11 Sep, 2015 - Comments: 0

The automotive industry, with its double-digit growth, is a very attractive market for equipment manufacturers. This growth is explained not only by the increasing number of cars produced for the Asia market, but also by the shift of basic customer expectations for things such as more hybrid and electrical vehicles, more sophisticated infotainment requirements, and more high-end features. O... » read more

Thermal Issues Getting Worse
By Ann Mutschler - 14 Aug, 2015 - Comments: 2

Making sure that smartphone you’re holding doesn’t burn your face when you make a call requires a tremendous amount of engineering effort at all levels of the design - the case, the chips, the packaging. The developers of the IP subsystems in that smartphone must adhere to very strict power and energy thresholds so the OEM putting it all together can stick to some semblance of a product des... » read more

How To Fix Common Power Problems
By Arvind Narayanan - 13 Aug, 2015 - Comments: 0

As the industry moves to ever more advanced technology nodes, managing power has emerged as a primary challenge in modern SoC design. With smaller nodes, the wires become taller and narrower, which increases the resistivity and leads to more pronounced voltage drop effects. Electro-migration effects are also more severe at advanced nodes, causing serious reliability concerns. Both RTL synthesis... » read more

Executive Insight: Wally Rhines
By Ed Sperling - 01 Jul, 2015 - Comments: 0

Wally Rhines, chairman and CEO of Mentor Graphics, sat down with Semiconductor Engineering to talk about what's changing across a wide swath of the industry, where the new opportunities will be, when security will become a real opportunity for EDA, and why Moore's Law will die but progress will continue forever. SE: Looking back over the past year, what's changed and where are the possible r... » read more

Pressure Builds To Revamp The Design Flow
By Ed Sperling - 23 Apr, 2015 - Comments: 1

Without [getkc id="7" kc_name="EDA"] there would be no [getkc id="74" comment="Moore's Law"] as we know it today, and without Moore's Law there would be a much more limited need for EDA. But after more than three decades of developing design flows packed with sophisticated tools to automate semiconductor design through verification, and thereby enable feature shrinks that are the basis of Moore... » read more

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