tag: emulation

Hardware Models For Software
By Brian Bailey - 24 Nov, 2015 - Comments: 1

Shift left, while a relatively new term, has become important in all parts of the SoC design flow, but its impacts are wide ranging and many still ill defined. It basically means that tasks have to be started earlier than in the past because more accuracy is required from tasks that are further down in the flow in order to make better predictions. It also implies that more steps are performed c... » read more

Innovating Virtualization In Emulation
By Frank Schirrmeister - 24 Nov, 2015 - Comments: 0

Last week we officially introduced our next-generation emulator. We used the words “datacenter” and “virtualization” a lot, and it is worthwhile to underline the significance of what just happened in emulation. The new concepts are just as key to emulation as was the invention of virtual memory and memory management units to processors and software development. The concept of virtual... » read more

One Flow To Rule Them All
By Brian Bailey - 12 Nov, 2015 - Comments: 0

The new mantra of shift left within EDA is nothing new and first made an appearance more than a decade ago. At that time there was a very large divide between logic synthesis and place and route. As wire delays became more important, timing closure became increasingly difficult with a logic synthesis flow that did not take that into account. The tools subsequently became tied much closer togeth... » read more

The Cloud, The IoE, And You
By Ernest Worthman - 05 Nov, 2015 - Comments: 0

If you’re anywhere in the high-tech biz, the two terms that are rocking your world are the Internet of Everything and the Cloud. Whether you are on the inside track of these, or on the sidelines, they are going to be two of the most disruptive technologies of the 21st century. The cloud is already here and gaining momentum. Some people will argue that the cloud has been here since the ince... » read more

SoC Verification For The Internet of Things
By Mentor, a Siemens Business - 04 Nov, 2015 - Comments: 0

Larger, more complex designs with more software and tighter power budgets require new verification solutions that target the associated technological challenges. This paper explores why traditional digital simulation and hardware prototypes fall short when it comes to verifying IoT and network designs, why using emulation is critical for a total verification solution, and why traditional in-cir... » read more

Hybrid Emulation Gets More Hybrid
By Ed Sperling - 29 Oct, 2015 - Comments: 0

Rising chip complexity is creating a booming emulation business, as chipmakers working at advanced nodes turn to bigger iron to get chips out the door on time. What started as a "shift lift"—doing more things earlier in the design cycle—is evolving into a more complex mix of hardware-accelerated verification for both hardware and software. There are even some new forays into power explor... » read more

Say Hi To Hybrid
By Doug Amos - 29 Oct, 2015 - Comments: 0

It has been proposed for some time that virtual platforms could be linked to emulation hardware in order to co-verify the software and hardware components of an SoC. However, that proposal now has evolved into hybrid emulation, a practical solution to allow pre-silicon verification and validation of today’s complex SoC designs. First-rate work by the standards body Accellera and the Open ... » read more

Requirements For Datacenter-Ready Emulation
By Frank Schirrmeister - 29 Oct, 2015 - Comments: 0

It’s time to look at what the latest trends in emulation are and to review some of the key requirements to make it datacenter-ready. Specifically, I will look at virtualization of external interfaces as well as emulation throughput, specifically the allocation of jobs into emulators. One overarching trend in verification lies in the connection of the engines in what Jim Hogan has dubbed t... » read more

Improving Emulation Throughput For Multi-Project SoC Designs
By Cadence - 28 Oct, 2015 - Comments: 0

As design sizes grow, so, too, does the verification effort. Indeed, verification has become the biggest challenge in SoC development, representing a majority share of the development cost, both for hardware itself and for verification at the hardware/software interface. And today, it’s not uncommon for companies to have distributed teams working on multiple SoC designs in parallel. In some c... » read more

Gaps In Performance, Power Coverage
By Brian Bailey - 15 Oct, 2015 - Comments: 0

The semiconductor industry always has used metrics to define progress, and in areas such as functional verification significant advances have been made. But so far, no effective metrics have been developed for power, performance, or other system-level concerns, which basically means that design teams have to run blind. On the plus side, the industry has migrated from the use of code coverage... » read more

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