tag: GlobalFoundries

Partitioning In 3D
By Katherine Derbyshire - 23 May, 2019 - Comments: 2

The best way to improve transistor density isn't necessarily to cram more of them onto a single die. Moore’s Law in its original form stated that device density doubles about every two years while cost remains constant. It relied on the observation that the cost of a processed silicon wafer remained constant regardless of the number of devices printed on it, which in turn depended on litho... » read more

Challenges In Making And Testing STT-MRAM
By Mark LaPedus - 07 May, 2019 - Comments: 1

Several chipmakers are ramping up a next-generation memory type called STT-MRAM, but there are still an assortment of manufacturing and test challenges for current and future devices. STT-MRAM, or spin-transfer torque MRAM, is attractive and gaining steam because it combines the attributes of several conventional memory types in a single device. In the works for years, STT-MRAM features the ... » read more

Breakthrough For Scan Diagnosis With Machine Learning
By Matthew Knowles - 07 May, 2019 - Comments: 0

Cell-aware diagnosis is a new and effective way to detect defects inside standard cells. Industry standard failure analysis (FA) results from a major foundry show that cell-aware diagnosis is very effective at increasing the resolution of the diagnosis by reducing the number of suspects in cell-internal defect data. With advanced technology nodes, we have more complex layout structures and f... » read more

Creating A Roadmap For Hardware Security
By Kevin Fogarty and Ed Sperling - 02 May, 2019 - Comments: 0

The U.S. Department of Defense and private industry consortiums are developing comprehensive and cohesive cybersecurity plans that will serve as blueprints for military, industrial and commercial systems. What is particularly noteworthy in all of these efforts is the focus on semiconductors. While software can be patched, vulnerabilities such as Spectre, Meltdown and Foreshadow need to be de... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 26 Apr, 2019 - Comments: 0

Fab tools and test Lam Research has developed a new self-maintaining or self-cleaning chamber for its etch tools. With the technology, Lam announced a new industry benchmark has been set for productivity in etch processing using its self-maintaining equipment. Etch process modules are typically cleaned weekly or monthly. Recently, Lam and a chipmaker reached the milestone of going 365 days... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 19 Apr, 2019 - Comments: 0

Chipmakers Here comes the battle between 5nm and 6nm processes at two foundry vendors—Samsung and TSMC. Meanwhile, Intel is behind and scrambling to get 10nm out the door. (Intel's 10nm is equivalent to 7nm from the foundries.) Last week, TSMC announced delivery of a complete version of its 5nm design infrastructure. TSMC’s 5nm technology is based on a finFET. This week, Samsung anno... » read more

3D NAND Metrology Challenges Growing
By Mark LaPedus - 09 Apr, 2019 - Comments: 8

3D NAND vendors face several challenges to scale their devices to the next level, but one manufacturing technology stands out as much more difficult at each turn—metrology. Metrology, the art of measuring and characterizing structures, is used to pinpoint problems and ensure yields for all chip types. In the case of 3D NAND, the metrology tools are becoming more expensive at each iteration... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 22 Mar, 2019 - Comments: 0

Chipmakers TrendForce released its foundry rankings for the first quarter of 2019. TSMC is still the clear leader, followed in order by Samsung, GlobalFoundries and UMC, according to the firm. It was a tough quarter for all foundries. Samsung has rolled out its new High Bandwidth Memory (HBM2E) product. The new solution, called Flashbolt, is the industry’s first HBM2E to deliver a 3.2Gbps... » read more

Making Chip Packaging Simpler
By Ed Sperling and Mark LaPedus - 21 Mar, 2019 - Comments: 1

Packaging is emerging as one of the most critical elements in semiconductor design, but it's also proving difficult to master both technically and economically. The original role of packaging was simply to protect the chips inside, and there are still packages that do just that. But at advanced nodes, and with the integration of heterogeneous components built using different manufacturing pr... » read more

130 BCDLite And BCD
By GlobalFoundries - 20 Mar, 2019 - Comments: 0

BCDLite and BCD process technologies offer a modular platform architecture based on the Globalfoundries’s low-power logic process with integrated low- and high-voltage bipolar transistors, high-voltage EDMOS/LDMOS transistors, precision analog passives and non-volatile memory. • New Gen2 release with significant performance improvements • BCDLite is tailored for cost-effective mobil... » read more

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