Benefits Of The Ultra-Low Leakage Currents from IGZO TFTs For Neuromorphic Applications


A new technical paper titled "A tunable multi-timescale Indium-Gallium-Zinc-Oxide thin-film transistor neuron towards hybrid solutions for spiking neuromorphic applications" was published by researchers at imec, CSIC Universidad de Sevilla, and Sungkyunkwan University. Abstract "Spiking neural network algorithms require fine-tuned neuromorphic hardware to increase their effectiveness. Such ... » read more

Buried Si/SiGe Interfaces Investigated Using Soft X-Ray Reflectometry and STEM-EDX


A new technical paper titled "Interface sharpness in stacked thin film structures: a comparison of soft X-ray reflectometry and transmission electron microscopy" was published by researchers at Physikalisch-Technische Bundesanstalt (PTB), imec, and Thermo Fisher Scientific Inc. The paper states: "A key element of semiconductor fabrication is the precise deposition of thin films. Among other... » read more

Chip Industry Week In Review


The U.S. Department of Commerce and Texas Instruments (TI) signed a non-binding preliminary memorandum of terms to provide up to $1.6 billion in CHIPS Act funding towards TI’s investment of over $18 billion for three 300mm semiconductor wafer fabs under construction in Texas and Utah. TI also expects to get about $6 billion to $8 billion from the U.S. Department of Treasury’s Investmen... » read more

Reasons To Know IGZO


Interest in monolithic 3D integration is driven by both compute-in-memory applications and a more general need for increased circuit density. Compute-in-memory architectures seek to reduce the power requirements of machine learning workloads, which are dominated by the movement of data between memory and logic components. Even in conventional architectures, though, placing high-density, high-ba... » read more

Chip Industry Technical Paper Roundup: August 13


New technical papers recently added to Semiconductor Engineering’s library: [table id=249 /] More ReadingTechnical Paper Library home   » read more

Chip Industry Week In Review


Three Fraunhofer Institutes (IIS/EAS, IZM, and ENAS) launched the Chiplet Center of Excellence, a research initiative to support the commercial introduction of chiplet technology. The center initially will focus on automotive electronics, developing workflows and methods for electronics design, demonstrator construction, and the evaluation of reliability. The UCIe Consortium published the Un... » read more

Chip Industry Week in Review


Okinawa Institute of Science and Technology proposed a new EUV litho technology using only four reflective mirrors and a new method of illumination optics that it claims will use 1/10 the power and cost half as much as existing EUV technology from ASML. Applied Materials may not receive expected U.S. funding to build a $4 billion research facility in Sunnyvale, CA, due to internal government... » read more

Classification and Localization of Semiconductor Defect Classes in Aggressive Pitches (imec, Screen)


A new technical paper titled "An Evaluation of Continual Learning for Advanced Node Semiconductor Defect Inspection" was published by Imec and SCREEN SPE Germany. Abstract "Deep learning-based semiconductor defect inspection has gained traction in recent years, offering a powerful and versatile approach that provides high accuracy, adaptability, and efficiency in detecting and classifying... » read more

Key Technologies To Extend EUV To 14 Angstroms


The top three foundries plan to implement high-NA EUV lithography as early as 2025 for the 18 angstrom generation, but the replacement of single exposure high-NA (0.55) over double patterning with standard EUV (NA = 0.33) depends on whether it provides better results at a reasonable cost per wafer. So far, 2024 has been a banner year for high-numerical aperture EUV lithography. Intel Foundry... » read more

Chip Industry Week In Review


The U.S. Department of Commerce and Amkor Technology signed a deal to provide up to $400 million in funding, under the CHIPS and Science Act, to build a previously announced end-to-end advanced packaging plant. The combined funding is expected to total about $2 billion. The new facility will add some 2,000 jobs in Peoria, Arizona. The SK hynix Board approved its Yongin Semiconductor Cluster... » read more

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