Next EUV Challenge: Pellicles


Extreme ultraviolet (EUV) lithography is still not ready for high-volume manufacturing, but the technology is at least moving in the right direction. Both the [gettech id="31045" comment="EUV"] light source and resists are making noticeable progress, even though there are still challenges in the arena. And then, there is the EUV mask infrastructure, which also has some gaps. “When EUV i... » read more

Improving Transistor Reliability


One of the more important challenges in reliability testing and simulation is the duty cycle dependence of degradation mechanisms such as negative bias temperature instability ([getkc id="278" kc_name="NBTI"]) and hot carrier injection (HCI). For example, as previously discussed, both the shift due to NBTI and the recovery of baseline behavior are very dependent on device workload. This is ... » read more

Where Is Next-Gen Lithography?


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at Imec; Harry Levinson, senior fellow and senior director of technology research at GlobalFoundries; Uday Mitra, vice president and head of strategy and marketing for the Etch Business Unit and Patterning Module at Applied Materials; Naoya Haya... » read more

Many Paths To Hafnium Oxide


Equipment and materials suppliers often talk about the fragmentation of integrated circuit processing. While the number of manufacturers has gone down, the diversity of the underlying semiconductor market has increased. Low-power processors for mobile devices, non-volatile memory for solid state disks, and dedicated graphics processors all have different requirements from the traditional ind... » read more

Where Is Next-Gen Lithography?


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

Where Is Next-Gen Lithography?


Semiconductor Engineering sat down to discuss lithography and photomask technologies with Greg McIntyre, director of the Advanced Patterning Department at [getentity id="22217" comment="Imec"]; Harry Levinson, senior fellow and senior director of technology research at [getentity id="22819" comment="GlobalFoundries"]; Uday Mitra, vice president and head of strategy and marketing for the Etch Bu... » read more

Manufacturing Bits: March 15


More multi-beam The multi-beam e-beam market is a hot topic. For example, Intel is quietly in the process of acquiring IMS Nanofabrication, a developer of multi-beam e-beam tools for mask writing applications. Meanwhile, at the recent SPIE Advanced Lithography conference, Mapper Lithography disclosed new upgrades for its multi-beam e-beam tool for use in direct-write lithography application... » read more

7nm Lithography Choices


Chipmakers are ramping up their 16nm/14nm logic processes, with 10nm expected to move into early production later this year. Barring a major breakthrough in lithography, chipmakers are using today’s 193nm immersion and multiple patterning for both 16/14nm and 10nm. Now, chipmakers are focusing on the lithography options for 7nm. For this, they hope to use a combination of two technologies ... » read more

Manufacturing Bits: Feb. 23


EUV resist venture JSR and Imec have signed a deal to form a joint venture to develop resists for extreme ultraviolet (EUV) lithography. The new company, dubbed EUV Resist Manufacturing & Qualification Center NV, is incorporated with a majority of the total shares held by JSR Micro NV. As EUV technology advances, the IC industry is putting pressure on materials suppliers and other vendo... » read more

Internet of FD-SOI Things?


Are fully-depleted silicon-on-insulator (FD-SOI) wafers having a moment? Certainly SOI wafers are not new. Soitec’s SmartCut layer transfer technology was patented in 1994, and wafers with implanted oxide layers were available before that. Still, adoption of SOI wafers has been limited. Though they offer improved device isolation and reduced parasitics, the increased wafer cost has been an ob... » read more

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