Power Grid Analysis Heats Up At 20nm


By Ann Steffora Mutschler Do a simple Internet search for the term ‘power grid analysis’ and most of the results are academic sources. However, given the physics of either planar or finFET at 20nm and below, the power grid will see significant impacts. Overall, there are a number of technical implications of migrating from 28nm down to 20, 16 or 14 nm, with further impacts of moving fro... » read more

Under One Roof


By Ed Sperling Microsoft’s decision to buy Nokia’s phone business, Apple’s move to build its own chips to more effectively run its software, and Google’s effort to develop its own hardware for next-generation platforms such as Google Glass mark an interesting reversal in the electronics industry. Disaggregation was the answer to slow-moving giants such as big-iron companies. Startin... » read more

The Week In Review: Sept. 6


By Ed Sperling ARM acquired Cadence’s high-resolution display processor cores, which it helped to co-develop. Coupled with ARM’s own graphics, the move sets up ARM to sell complete subsystems. Cadence also won a deal with SMIC, which is using Cadence’s low-power flow and signoff technology for its 40nm process. Mentor Graphics won a deal with Advanced Wireless Semiconductor Co., whic... » read more

The Week In Review: Sept. 3


By Mark LaPedus The cellular chip supplier landscape is littered with corpses. So will 4G lead to the destruction of Qualcomm and Intel? That’s highly unlikely, according to a blog from Strategy Analytics. “With the recent announcement of a multimode LTE chipset from Intel, it seems likely that Qualcomm and Intel will maintain their status as the top two cellular radio chipset suppliers in... » read more

Layers Of Business And Tech Issues


Slice an onion in half and one onion pretty much looks like any other onion. Peel it back, layer by layer, and put it under a powerful microscope, and each layer suddenly looks very different. The same is true for semiconductors. To the outside world, a chip is a chip and an interconnect is an interconnect. Each one has different specs, but even the parts that make up those chips look remar... » read more

It’s A Materials World


By Mark LaPedus At a recent event, Intel’s fab materials guru described a nightmarish occurrence that nearly brought the chip giant to its knees. Tim Hendry, director of fab materials and vice president of the Technology and Manufacturing Group at Intel, said the company obtained a critical material from an undisclosed supplier. “This large sub-supplier, a very large chemical company, m... » read more

Power Shifts In Digital Chip Space


By Bhanu Kapoor The power issue has been quite disrupting in the digital semiconductor space. The processor architecture shifted to parallel processing with the “power wall” stopping the frequency scaling that the industry had conveniently used in the last few decades. The power issue also is causing semiconductor process technology to change in ways other than simply scaling from one ... » read more

Blog Review: July 31


By Ed Sperling Wherever you turn in IC design, there’s always someone talking about future problems involving the interconnect. Cadence’s Brian Fuller puts the latest speech by North Carolina State professor Paul Franzon in historical perspective—or at least in the shadow of the last dire prediction by Intel’s Mark Bohr two decades ago. Incidentally, Bohr’s warning turned out to be r... » read more

The Week In Review: July 22


By Mark LaPedus ASML Holding has been under pressure to bring extreme ultraviolet (EUV) lithography into mass production. EUV is still delayed. Now, in their latest roadmaps, leading-edge chipmakers are counting on ASML’s 300mm EUV scanner for insertion at the 10nm node. Yet, at the same time, ASML also is working on a 450mm version of the EUV tool. “EUV (on 300mm) is a higher priority th... » read more

450mm: Out Of Sync


By Mark LaPedus The IC industry has been talking about it for ages, but vendors are finally coming to terms with a monumental shift in the business. The vast changes involve a pending and critical juncture, where the 450mm wafer size transition, new device architectures and other technologies will likely converge at or near the same time. In one possible scenario, 450mm fabs are projected ... » read more

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