Who Owns What And Why


Who’s calling the shots these days—and how long they’ll continue calling the shots—is turning out to be as much conjecture as playing the futures exchange. There are so many changes underway that even engineers are crossing boundaries no one ever expected and ending up in companies outside of IC design or moving from seemingly far afield into the design world. Still, there are some c... » read more

Why the Big Players Like 450mm Wafers


The reason semiconductor manufacturers like the idea of 450-mm wafers is easy to understand:  bigger wafers should lower the per-chip cost of manufacturing.  But as I mentioned in my last post, this per-chip cost advantage doesn’t apply to lithography.  Each time a wafer size is increased, only the non-litho (per-chip) costs go down, and so lithography costs take up a bigger portion of the... » read more

Experts At The Table: Coherency


System-Level Design sat down to discuss coherency with Mirit Fromovich, principal solutions engineer at Cadence; Drew Wingard, CTO of Sonics; Mike Gianfagna, vice president of marketing at Atrenta, and Marcello Coppola, technical director at STMicroelectronics. What follow are excerpts of that conversation. SLD: We’ve been hearing a lot about Wide I/O. Why is it so important and what effec... » read more

Experts At The Table: Coherency


System-Level Design sat down to discuss coherency with Mirit Fromovich, principal solutions engineer at Cadence; Drew Wingard, CTO of Sonics; Mike Gianfagna, vice president of marketing at Atrenta, and Marcello Coppola, technical director at STMicroelectronics. What follow are excerpts of that conversation. SLD: We’ve been hearing a lot about Wide I/O. Why is it so important and what effec... » read more

The Trouble With FinFETs


By Joanne Itow The industry’s quest to continue on the semiconductor roadmap defined by Moore’s Law has led to the adoption of a new transistor structure. Whether you call them finFETs, tri-gate or 3D transistors, building these new devices is difficult. But the technology is only half the challenge. In 2002, Chen Ming Hu* spoke at the Semico Summit. The title of his presentation was �... » read more

What Comes After FinFETs?


By Mark LaPedus The semiconductor industry is currently making a major transition from conventional planar transistors to finFETs starting at 22nm. The question is what’s next? In the lab, IBM, Intel and others have demonstrated the ability to scale finFETs down to 5nm or so. If or when finFETs runs out of steam, there are no less than 18 different next-generation candidates that could o... » read more

G450C To Align Vendors During 450mm Transition


By David Lammers Innovation and synchronization among multiple companies do not often go hand in hand. But for the 450mm wafer transition to provide its full benefits, chip makers and their suppliers will need to do more than a simple wafer size scale up. That may lead the Global 450 Consortium (G450C) to serve as the proving ground for efforts to more closely match the electrical results o... » read more

What’s After NAND Flash?


By Mark LaPedus For years, many have predicted the end of flash memory scaling, particularly NAND, but the technology continues to defy the odds as it moves down the process curve. Still, there are signs that the floating gate structure in today’s flash memory is on its last legs. The floating gate is seeing an undesirable reduction in the control gate to capacitive coupling ratio. And ... » read more

The Easy Stuff Is Over


By Ed Sperling Doomsayers have been predicting the end of Moore’s Law for the better part of a decade. While it appears that it will still remain viable for some companies—Intel and IBM already are looking into single digits of nanometers and researchers speculating about picometer designs—for most companies the race is over. Progress will still be made in moving SoCs from one node to... » read more

Why 450mm wafers?


Why is 450-mm development so important to Intel (and Samsung and TSMC)? A few years ago, Intel and TSMC began heavily promoting the need for a transition from the current standard silicon wafer size, 300 mm, to the new 450-mm wafers.  While many have worked on 450-mm standards and technology for years, it is only recently that the larger wafer has received enough attention and support (not ... » read more

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