What’s Ahead For System-Level Design


By Ann Steffora Mutschler Architecting an SoC today is incredibly difficult. When you add in the number of available transistors, the manufacturing effects of smaller nodes, IP and software that must be integrated, among other things, the challenges just keep mounting. Depending on what market segment the SoC will be designed into has a huge impact, as well. “It is impossible to ove... » read more

TLM-Driven Design And Verification—Time For A Methodology Shift


While today’s RTL design and verification flows are a step up from the gate-level flows of two decades ago, RTL flows are straining to meet the demands of most product teams. When designs are sourced and verified at the register transfer level (RTL), IP reuse is difficult, functional verification is lengthy and cumbersome, and architectural decisions cannot be confirmed prior to RTL verificat... » read more

12 Design Techniques For Successful Integration Of Data Converter IP Into An SoC


To deliver the demanding performance and faster operation of today’s systems—from communication interfaces to high-image-quality video and multimedia systems—consumer applications employ digital signal processing extensively. Data converters form the interface between the real-world analog signals and the digital domain. They are, therefore, an essential element of the complete signal pro... » read more

Experts At The Table: SoC Verification


By Ed Sperling System-Level Design sat down to discuss the challenges of verification with Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadence; Charles Janac, chairman and CEO of Arteris, Venkat Iyer, CTO of Uniquify; and Adnan Hamid, CEO of Breker Verification Systems. What follows are excerpts of that discussion. SLD: How important is it t... » read more

Experts At The Table: SoC Verification


By Ed Sperling System-Level Design sat down to discuss the challenges of verification with Frank Schirrmeister, group director for product marketing of the System Development Suite at Cadence; Charles Janac, chairman and CEO of Arteris, Venkat Iyer, CTO of Uniquify; and Adnan Hamid, CEO of Breker Verification Systems. What follows are excerpts of that discussion. SLD: As we get more third-... » read more

Open IP Development Tools


By Pascal Chauvet How much time have you wasted trying to understand software tools by deciphering the logic of their creator? I always find it very frustrating to be limited by features and tool capabilities that do not do exactly what I want, or which do not work at all with my other applications. We are engineers! We can learn and adapt, but we often want to be able to extend and improve th... » read more

Experts At The Table: The Business Of IP


By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss IP supply chain issues with Jim Hogan, an independent VC; Jack Brown, senior vice president at Sonics; Mike Gianfagna, vice president of marketing at Atrenta; Paul Hollingworth, vice president of strategic accounts at eSilicon, and Warren Savage, CEO of IPextreme. What follows are excerpts of that conversation. LPHP:... » read more

Experts At The Table: The Business Of IP


Low-Power/High-Performance Engineering sat down to discuss IP supply chain issues with Jim Hogan, an independent VC; Jack Brown, senior vice president at Sonics; Mike Gianfagna, vice president of marketing at Atrenta; Paul Hollingworth, vice president of strategic accounts at eSilicon, and Warren Savage, CEO of IPextreme. What follows are excerpts of that conversation. LPHP: There’s so muc... » read more

Being Different Is Bad


By Ann Steffora Mutschler Today’s SoCs contain as much as 80% existing IP that either has been re-used from previous projects or obtained from a third party. Models are created of this hardware IP, as well as new portions of the design, in order to create a virtual prototype that allows the engineering team to see the complete system by running software and applications. While this a... » read more

Verify This


By Frank Ferro Verify this? No, New Jersey in me is not coming out. This is not a pejorative; it is simply a request and a question. It is a request by SoC designers to the verification team. It is also the verification’s team response when they realize the enormity of the task: “You want me to verify this?” As I continue the discussion on the use of System IP for SoC design, one of ... » read more

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