Research Bits: Feb. 17


Analog layout foundation model Researchers from Pohang University of Science and Technology (POSTECH) built a foundation model for automated analog circuit layout. The team used a self-supervised learning approach, in which the model learns without human-provided labels. To counter a lack of available training data, the team divided analog layouts into small patches, masked part of each lay... » read more

CNT Nano Sandpaper For Atomic-Level Polishing (KAIST)


KAIST researchers published "Carbon nanotube sandpaper for atomic-precision surface finishing." Abstract "Sandpapers, also known as coated abrasives, have served as the most familiar surface finishing tools since their first invention in the 13th century. However, they remain unsuitable for advanced industries requiring nanometer-level precision due to limitations in abrasive uniformity a... » read more

Chip Industry Week In Review


Big deals and fundings Teradyne and MultiLane are forming a joint venture, MultiLane Test Products (MLTP), to accelerate the development of test solutions for high speed data connections.  Teradyne will be the majority owner. Ricursive Intelligence raised $300M Series A for AI-driven IC design. IonQ plans to acquire SkyWater for ~$1.8B, creating a "vertically integrated full-stack q... » read more

Research Bits: Jan. 20


ALD for Ru wiring Researchers from Ulsan National Institute of Science and Technology (UNIST), Hongik University, and Tanaka Precious Metal Technologies developed an atomic layer deposition (ALD) process for creating chip interconnects using a ruthenium (Ru) precursor with a thermal stability up to 400 °C. The high-temperature ALD process can produce dense, high-quality Ru films without deg... » read more

Research Bits: Jan. 12


Wafer-scale two-photon lithography Researchers from Lawrence Livermore National Laboratory (LLNL) and Stanford University demonstrated a two-photon lithography (TPL) platform for wafer-scale manufacturing. The TPL platform uses large arrays of metalenses to split a femtosecond laser into more than 120,000 coordinated focal spots that write simultaneously across centimeter-scale areas. The a... » read more

Chip Industry Week In Review


Space Forge autonomously generated plasma aboard its ForgeStar-1 satellite, utilizing extreme low Earth orbit (LEO) conditions needed for gas-phase crystal growth of wide- and ultra-wide bandgap materials, GaN, SiC, aluminum nitride, and diamonds. Copper prices surged to a historic record of $12,600 per metric ton, an increase of more than 40% YOY, which will impact the cost of data center b... » read more

Chip Industry Technical Paper Roundup: Dec 30


New technical papers recently added to Semiconductor Engineering’s library: [table id=509 /] Find more semiconductor research papers here. » read more

Nano Gap MEMS Switches for Power Gating in Low Power Systems (KAIST, Chonnam National Univ.)


A new technical paper titled "Ultra-Fast, Low-Resistance Nano Gap Electromechanical Switch for Power Gating Applications" was published by researchers at KAIST and Chonnam National University. Abstract "The growing demand for artificial intelligence and high-performance computing accelerates concerns over leakage power in highly integrated semiconductor systems. Power gating can reduce th... » read more

Chip Industry Technical Paper Roundup: Dec. 16


New technical papers recently added to Semiconductor Engineering’s library: [table id=501 /] Find more semiconductor research papers here and in the most recent Chip Industry Week in Review. » read more

Chip Industry Week in Review


Deals of the week: Arteris announced plans to acquire cybersecurity provider Cycuity. “Expanding our technology portfolio to include Cycuity’s hardware security assurance products will enable our customers to achieve secure on-chip data movement,” said Charlie Janac, chairman and CEO of Arteris. Qualcomm acquired Ventana Micro Systems, a maker of RISC-V data center-class CPU IP. ... » read more

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