Blog Review: Sept. 10


Cadence's Satish Kumar C explains Port-Based Routing, a feature in in CXL 3.0 and 3.1 that changes how CXL switches operate within a CXL fabric to enable the creation of much larger, more flexible, and more efficient topologies. Siemens' Bill Hargin demystifies copper foil thickness and weight measurements and why being precise has an impact on signal integrity and crosstalk simulations.... » read more

How Security Regulation Can Help Grid Stability


Grid stability is at risk. The advent of Distributed Energy Resources (DERs), such as solar, wind, and batteries, has increased the attack surface of energy generation. While cities once had few power plants, they now host thousands of smaller, intermittent sources. These DERs are often managed by entities without uptime requirements. At the same time, traditional energy sources face greater de... » read more

Security Requirements And Penalties Grow For Chipmakers


Governments and systems companies are fundamentally changing the rules around semiconductor security, forcing chipmakers and their suppliers to comply with tough new regulations that require resiliency in hardware. Unlike in the past, chips and systems deployed in these markets must be able to respond to threats rather than waiting for the next version of a chip or IP to address vulnerabilities... » read more

Enabling Secure 5G Standalone (SA) Core Deployments


5G SA introduces a fundamentally new, cloud-native, service-based core architecture that enables exceptional performance, agility, and dynamic service delivery. It marks a departure from legacy 4G LTE and 5G Non-Standalone (NSA) models, offering enhanced flexibility and scalability to support diverse use cases through features like network slicing and rapid service innovation. However, this ... » read more

Blog Review: September 3


Cadence's Sriram Sharma Kalluri compares convolutional neural networks (CNNs) and transformers to show how their different architectures give them particular strengths and why the choice between them depends on the specific task, the available data, and the computational resources. Siemens' John McMillan provides a primer on the major IC package types, how they influence system design, therm... » read more

AI’s Value In Chip Design Depends On Data Availability


Experts at the Table: Semiconductor Engineering sat down to discuss the advantages and challenges in using AI in designing chips, with Chuck Alpert, Cadence Fellow; Sathish Balasubramanian, head of product marketing and senior director for custom IC at Siemens EDA; Anand Thiruvengadam, senior director and head of AI product management at Synopsys; Sailesh Kumar, CEO of Baya Systems; Mehir ... » read more

Chip Industry Week in Review


Microsoft, OpenAI, and NVIDIA warned about power swings and physical damage to power grids increasing from AI training workloads and jointly proposed a multi-pronged approach to stabilize power in AI training data centers. Meanwhile, Anthropic issued a warning about the weaponization of agentic AI in a new 25-page Threat Intelligence report. Key concerns involve the evolution in AI-assisted ... » read more

Government Funding For Chip Design Tools Spreads


Governments around the globe are starting to invest more heavily in chip design tools and related research as part of an effort to boost on-shore chip production, opening new opportunities for startups and established EDA companies. Those cash infusions, which are being doled out in the U.S., Europe, and Asia, are part of a growing recognition of the importance of design automation tools wit... » read more

Silicon Lifecycle Management Gains Traction, But It’s Complicated


Silicon lifecycle management (SLM) is gaining ground in semiconductor design and test by leveraging specialized on-die sensors and analytics engines to improve power, performance, yield, and reliability. Most modern SoCs mitigate the guesswork by leveraging DFT, which includes adding memory built-in self-test (BiST) or improving functional coverage, but these tests were meant for verifying c... » read more

AI Meets Device Modeling: Transforming Compact Modeling With Machine Learning


As semiconductor technologies advance, device structures are becoming increasingly complex. New materials and architectures introduce intricate physical effects requiring accurate modeling to ensure reliable circuit simulation and design. Correspondingly, these accuracy requirements raise demands on the accuracy and efficiency of device modeling. Modern device models often involve hundreds o... » read more

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